Bruce Jeffrey Barbara

Person

Discovery Bay, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory devices and methods for high random transaction rate
- Patent number 8,630,111
- Issue date Jan 14, 2014
- Cypress Semiconductor Corporation
- Dinesh Maheshwari
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory devices and methods for high random transaction rate
- Patent number 8,570,790
- Issue date Oct 29, 2013
- Cypress Semiconductor Corporation
- Dinesh Maheshwari
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for de-latch of an integrated circuit
- Patent number 8,472,276
- Issue date Jun 25, 2013
- Cypress Semiconductor Corporation
- Bruce Barbara
- G11 - INFORMATION STORAGE
Information Patent Grant
Stacked die module
- Patent number 8,324,725
- Issue date Dec 4, 2012
- FormFactor, Inc.
- Igor Y. Khandros
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory system and method
- Patent number 8,095,747
- Issue date Jan 10, 2012
- Cypress Semiconductor Corporation
- Bruce Barbara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to build a wirebond probe card in a many at a time fashion
- Patent number 7,884,006
- Issue date Feb 8, 2011
- FormFactor, Inc.
- Benjamin N. Eldridge
- G01 - MEASURING TESTING
Information Patent Grant
Voltage fault detection and protection
- Patent number 7,609,080
- Issue date Oct 27, 2009
- FormFactor, Inc.
- Charles A. Miller
- G01 - MEASURING TESTING
Information Patent Grant
Method to build a wirebond probe card in a many at a time fashion
- Patent number 7,459,795
- Issue date Dec 2, 2008
- FormFactor, Inc.
- Benjamin N. Eldridge
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICES AND METHODS FOR HIGH RANDOM TRANSACTION RATE
- Publication number 20150003182
- Publication date Jan 1, 2015
- CYPRESS SEMICONDUCTOR CORPORATION
- Dinesh Maheshwari
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES AND METHODS FOR HIGH RANDOM TRANSACTION RATE
- Publication number 20140293717
- Publication date Oct 2, 2014
- CYPRESS SEMICONDUCTOR CORPORATION
- Dinesh Maheshwari
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES AND METHODS FOR HIGH RANDOM TRANSACTION RATE
- Publication number 20130223165
- Publication date Aug 29, 2013
- CYPRESS SEMICONDUCTOR CORPORATION
- Dinesh Maheshwari
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES AND METHODS FOR HIGH RANDOM TRANSACTION RATE
- Publication number 20120243301
- Publication date Sep 27, 2012
- CYPRESS SEMICONDUCTOR CORPORATION
- Dinesh Maheshwari
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM AND METHOD
- Publication number 20100082861
- Publication date Apr 1, 2010
- CYPRESS SEMICONDUCTOR CORPORATION
- Bruce Barbara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE FAULT DETECTION AND PROTECTION
- Publication number 20100039739
- Publication date Feb 18, 2010
- FormFactor, Inc.
- Bruce J. Barbara
- G01 - MEASURING TESTING
Information Patent Application
METHOD TO BUILD A WIREBOND PROBE CARD IN A MANY AT A TIME FASHION
- Publication number 20090142707
- Publication date Jun 4, 2009
- FormFactor, Inc.
- Benjamin N. Eldridge
- G01 - MEASURING TESTING
Information Patent Application
VOLTAGE FAULT DETECTION AND PROTECTION
- Publication number 20060217906
- Publication date Sep 28, 2006
- Bruce J. Barbara
- G01 - MEASURING TESTING
Information Patent Application
Stacked Die Module
- Publication number 20060076690
- Publication date Apr 13, 2006
- FormFactor, Inc.
- Igor Y. Khandros
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to build a wirebond probe card in a many at a time fashion
- Publication number 20060040417
- Publication date Feb 23, 2006
- FormFactor, Inc.
- Benjamin N. Eldridge
- G01 - MEASURING TESTING

Bruce Jeffrey Barbara

Person

Patents Grantslast 30 patents

Memory devices and methods for high random transaction rate

Memory devices and methods for high random transaction rate

System and method for de-latch of an integrated circuit

Stacked die module

Memory system and method

Method to build a wirebond probe card in a many at a time fashion

Voltage fault detection and protection

Method to build a wirebond probe card in a many at a time fashion

Patents Applicationslast 30 patents

MEMORY DEVICES AND METHODS FOR HIGH RANDOM TRANSACTION RATE

MEMORY DEVICES AND METHODS FOR HIGH RANDOM TRANSACTION RATE

MEMORY DEVICES AND METHODS FOR HIGH RANDOM TRANSACTION RATE

MEMORY DEVICES AND METHODS FOR HIGH RANDOM TRANSACTION RATE

MEMORY SYSTEM AND METHOD

VOLTAGE FAULT DETECTION AND PROTECTION

METHOD TO BUILD A WIREBOND PROBE CARD IN A MANY AT A TIME FASHION

VOLTAGE FAULT DETECTION AND PROTECTION

Stacked Die Module

Method to build a wirebond probe card in a many at a time fashion