Bryan Broussard

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Enhanced low-priority arbitration
- Patent number 12,045,182
- Issue date Jul 23, 2024
- Advanced Micro Devices, Inc.
- Eric Christopher Morton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cross-chiplet performance data streaming
- Patent number 11,947,476
- Issue date Apr 2, 2024
- Advanced Micro Devices, Inc.
- Bryan Broussard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for maintaining cache consistency during reordering
- Patent number 11,831,565
- Issue date Nov 28, 2023
- Advanced Micro Devices, Inc.
- Greggory D. Donley
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Enhanced low-priority arbitration
- Patent number 11,675,718
- Issue date Jun 13, 2023
- Advanced Micro Devices, Inc.
- Eric Christopher Morton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distributed interrupt priority and resolution of race conditions
- Patent number 11,341,069
- Issue date May 24, 2022
- Advanced Micro Devices, Inc.
- Bryan P Broussard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing chiplet wakeup latency
- Patent number 11,281,280
- Issue date Mar 22, 2022
- Advanced Micro Devices, Inc.
- Benjamin Tsien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Probe interrupt delivery
- Patent number 11,210,246
- Issue date Dec 28, 2021
- Advanced Micro Devices, Inc.
- Vydhyanathan Kalyanasundharam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System-wide low power management
- Patent number 11,054,887
- Issue date Jul 6, 2021
- Advanced Micro Devices, Inc.
- Benjamin Tsien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-node system low power management
- Patent number 10,671,148
- Issue date Jun 2, 2020
- Advanced Micro Devices, Inc.
- Benjamin Tsien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing chiplet wakeup latency
- Patent number 10,656,696
- Issue date May 19, 2020
- Advanced Micro Devices, Inc.
- Benjamin Tsien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bandwidth matched scheduler
- Patent number 10,601,723
- Issue date Mar 24, 2020
- Advanced Micro Devices, Inc.
- Alan Dodson Smith
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Compression of frequent data values across narrow links
- Patent number 10,305,509
- Issue date May 28, 2019
- Advanced Micro Devices, Inc.
- Greggory D. Donley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input/output memory map unit and northbridge
- Patent number 10,223,280
- Issue date Mar 5, 2019
- Advanced Micro Devices, Inc.
- Vydhyanathan Kalyanasundharam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input/output memory map unit and northbridge
- Patent number 10,025,721
- Issue date Jul 17, 2018
- Advanced Micro Devices, Inc.
- Vydhyanathan Kalyanasundharam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compression of frequent data values across narrow links
- Patent number 9,793,919
- Issue date Oct 17, 2017
- Advanced Micro Devices, Inc.
- Greggory D. Donley
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
CROSS-CHIPLET PERFORMANCE DATA STREAMING
- Publication number 20230315657
- Publication date Oct 5, 2023
- ADVANCED MICRO DEVICES, INC.
- Bryan Broussard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhanced Low-Priority Arbitration
- Publication number 20220309013
- Publication date Sep 29, 2022
- ADVANCED MICRO DEVICES, INC.
- Eric Christopher Morton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTRIBUTED INTERRUPT PRIORITY AND RESOLUTION OF RACE CONDITIONS
- Publication number 20220114123
- Publication date Apr 14, 2022
- ADVANCED MICRO DEVICES, INC.
- Bryan P Broussard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINING WRITE TRANSACTIONS OF A LARGE WRITE
- Publication number 20220100411
- Publication date Mar 31, 2022
- ADVANCED MICRO DEVICES, INC.
- GREGG DONLEY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROBE INTERRUPT DELIVERY
- Publication number 20220100686
- Publication date Mar 31, 2022
- ADVANCED MICRO DEVICES, INC.
- Vydhyanathan Kalyanasundharam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM-WIDE LOW POWER MANAGEMENT
- Publication number 20210333860
- Publication date Oct 28, 2021
- ADVANCED MICRO DEVICES, INC.
- Benjamin Tsien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING CHIPLET WAKEUP LATENCY
- Publication number 20200387208
- Publication date Dec 10, 2020
- ADVANCED MICRO DEVICES, INC.
- Benjamin Tsien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR MAINTAINING CACHE CONSISTENCY DURING REORDERING
- Publication number 20200112525
- Publication date Apr 9, 2020
- ADVANCED MICRO DEVICES, INC.
- Greggory D. Donley
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PROBE INTERRUPT DELIVERY
- Publication number 20200065275
- Publication date Feb 27, 2020
- ADVANCED MICRO DEVICES, INC.
- Vydhyanathan Kalyanasundharam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LINK LAYER DATA PACKING AND PACKET FLOW CONTROL SCHEME
- Publication number 20200059437
- Publication date Feb 20, 2020
- ADVANCED MICRO DEVICES, INC.
- Greggory D. Donley
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
BANDWIDTH MATCHED SCHEDULER
- Publication number 20190319891
- Publication date Oct 17, 2019
- ADVANCED MICRO DEVICES, INC.
- Alan Dodson Smith
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM-WIDE LOW POWER MANAGEMENT
- Publication number 20190204899
- Publication date Jul 4, 2019
- Advanced Micro Devices, Inc.
- Benjamin Tsien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-NODE SYSTEM LOW POWER MANAGEMENT
- Publication number 20190196574
- Publication date Jun 27, 2019
- Advanced Micro Devices, Inc.
- Benjamin Tsien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INPUT/OUTPUT MEMORY MAP UNIT AND NORTHBRIDGE
- Publication number 20180307619
- Publication date Oct 25, 2018
- ADVANCED MICRO DEVICES, INC.
- Vydhyanathan Kalyanasundharam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSION OF FREQUENT DATA VALUES ACROSS NARROW LINKS
- Publication number 20180167082
- Publication date Jun 14, 2018
- Advanced Micro Devices, Inc.
- Greggory D. Donley
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INPUT/OUTPUT MEMORY MAP UNIT AND NORTHBRIDGE
- Publication number 20150120978
- Publication date Apr 30, 2015
- ATI Technologies ULC
- Vydhyanathan Kalyanasundharam
- G06 - COMPUTING CALCULATING COUNTING

Bryan Broussard

Person

Patents Grantslast 30 patents

Enhanced low-priority arbitration

Cross-chiplet performance data streaming

Method for maintaining cache consistency during reordering

Enhanced low-priority arbitration

Distributed interrupt priority and resolution of race conditions

Reducing chiplet wakeup latency

Probe interrupt delivery

System-wide low power management

Multi-node system low power management

Reducing chiplet wakeup latency

Bandwidth matched scheduler

Compression of frequent data values across narrow links

Input/output memory map unit and northbridge

Input/output memory map unit and northbridge

Compression of frequent data values across narrow links

Patents Applicationslast 30 patents

CROSS-CHIPLET PERFORMANCE DATA STREAMING

Enhanced Low-Priority Arbitration

DISTRIBUTED INTERRUPT PRIORITY AND RESOLUTION OF RACE CONDITIONS

COMBINING WRITE TRANSACTIONS OF A LARGE WRITE

PROBE INTERRUPT DELIVERY

SYSTEM-WIDE LOW POWER MANAGEMENT

REDUCING CHIPLET WAKEUP LATENCY

METHOD FOR MAINTAINING CACHE CONSISTENCY DURING REORDERING

PROBE INTERRUPT DELIVERY

LINK LAYER DATA PACKING AND PACKET FLOW CONTROL SCHEME

BANDWIDTH MATCHED SCHEDULER

SYSTEM-WIDE LOW POWER MANAGEMENT

MULTI-NODE SYSTEM LOW POWER MANAGEMENT

INPUT/OUTPUT MEMORY MAP UNIT AND NORTHBRIDGE

COMPRESSION OF FREQUENT DATA VALUES ACROSS NARROW LINKS

INPUT/OUTPUT MEMORY MAP UNIT AND NORTHBRIDGE