Bryan E. Veal

Person

Beaverton, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Reducing network latency during low power operation
- Patent number 10,819,638
- Issue date Oct 27, 2020
- Intel Corporation
- Steen K. Larsen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory-addressed maps for persistent storage device
- Patent number 10,635,598
- Issue date Apr 28, 2020
- Intel Corporation
- Bryan Veal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient redundant array of independent disks (RAID) write hole so...
- Patent number 9,910,786
- Issue date Mar 6, 2018
- Intel Corporation
- James P. Freyensee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing network latency during low power operation
- Patent number 9,876,720
- Issue date Jan 23, 2018
- Intel Corporation
- Steen K. Larsen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Source core interrupt steering
- Patent number 9,710,408
- Issue date Jul 18, 2017
- Intel Corporation
- Bryan E. Veal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Host-managed non-volatile memory
- Patent number 9,645,739
- Issue date May 9, 2017
- Intel Corporation
- Bryan E. Veal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hash map support in a storage device
- Patent number 9,569,141
- Issue date Feb 14, 2017
- Intel Corporation
- Annie Foong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing an atomic write operation across multiple storage devices
- Patent number 9,471,448
- Issue date Oct 18, 2016
- Intel Corporation
- Dan J. Williams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, device and system for aggregation of shared address devices
- Patent number 9,460,040
- Issue date Oct 4, 2016
- Intel Corporation
- Bryan E. Veal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device to augment volatile memory in a graphics subsyste...
- Patent number 9,317,892
- Issue date Apr 19, 2016
- Intel Corporation
- Bryan E. Veal
- G11 - INFORMATION STORAGE
Information Patent Grant
Maintaining at least one journal and/or at least one data structure...
- Patent number 9,292,213
- Issue date Mar 22, 2016
- Intel Corporation
- Bryan E. Veal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single instruction processing of network packets
- Patent number 9,054,987
- Issue date Jun 9, 2015
- Intel Corporation
- Bryan E. Veal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reducing network latency during low power operation
- Patent number 8,984,309
- Issue date Mar 17, 2015
- Intel Corporation
- Mazhar I. Memon
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for synchronizing storage volumes
- Patent number 8,938,641
- Issue date Jan 20, 2015
- Intel Corporation
- Bryan E. Veal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Directing packets to a processor unit
- Patent number 8,626,955
- Issue date Jan 7, 2014
- Intel Corporation
- Bryan Veal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Single instruction processing of network packets
- Patent number 8,493,979
- Issue date Jul 23, 2013
- Intel Corporation
- Bryan E. Veal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Source core interrupt steering
- Patent number 8,321,615
- Issue date Nov 27, 2012
- Intel Corporation
- Annie Foong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Preserving packet order when migrating network flows between cores
- Patent number 7,836,195
- Issue date Nov 16, 2010
- Intel Corporation
- Bryan Veal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Communication between processor core partitions with exclusive read...
- Patent number 7,650,488
- Issue date Jan 19, 2010
- Intel Corporation
- Annie Foong
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORY-ADDRESSED MAPS FOR PERSISTENT STORAGE DEVICE
- Publication number 20190050341
- Publication date Feb 14, 2019
- Intel Corporation
- Bryan Veal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques for Input/Output Access to Memory or Storage by a Virtua...
- Publication number 20180088978
- Publication date Mar 29, 2018
- Intel Corporation
- Yadong Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING NETWORK LATENCY DURING LOW POWER OPERATION
- Publication number 20180013676
- Publication date Jan 11, 2018
- Intel Corporation
- Steen K. Larsen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HASH MAP SUPPORT IN A STORAGE DEVICE
- Publication number 20170220299
- Publication date Aug 3, 2017
- Intel Corporation
- Annie Foong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT REDUNDANT ARRAY OF INDEPENDENT DISKS (RAID) WRITE HOLE SO...
- Publication number 20170123995
- Publication date May 4, 2017
- Intel Corporation
- James P. Freyensee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMING AN ATOMIC WRITE OPERATION ACROSS MULTIPLE STORAGE DEVICES
- Publication number 20160170850
- Publication date Jun 16, 2016
- Intel Corporation
- Dan J. WILLIAMS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HOST-MANAGED NON-VOLATILE MEMORY
- Publication number 20160092113
- Publication date Mar 31, 2016
- Intel Corporation
- BRYAN E. VEAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HASH MAP SUPPORT IN A STORAGE DEVICE
- Publication number 20150278208
- Publication date Oct 1, 2015
- Annie Foong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reducing Network Latency During Low Power Operation
- Publication number 20150163143
- Publication date Jun 11, 2015
- Intel Corporation
- Steen K. Larsen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MAINTAINING AT LEAST ONE JOURNAL AND/OR AT LEAST ONE DATA STRUCTURE...
- Publication number 20150134875
- Publication date May 14, 2015
- BRYAN E. VEAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR CACHING A STORAGE MEDIUM
- Publication number 20140281124
- Publication date Sep 18, 2014
- BRYAN E. VEAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
A METHOD AND DEVICE TO AUGMENT VOLATILE MEMORY IN A GRAPHICS SUBSYS...
- Publication number 20140198116
- Publication date Jul 17, 2014
- Bryan E. Veal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SYNCHRONIZING STORAGE VOLUMES
- Publication number 20140089728
- Publication date Mar 27, 2014
- Bryan E. Veal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SINGLE INSTRUCTION PROCESSING OF NETWORK PACKETS
- Publication number 20140036909
- Publication date Feb 6, 2014
- Bryan E. Veal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, DEVICE AND SYSTEM FOR AGGREGATION OF SHARED ADDRESS DEVICES
- Publication number 20130339565
- Publication date Dec 19, 2013
- Bryan E. Veal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Source Core Interrupt Steering
- Publication number 20130080674
- Publication date Mar 28, 2013
- Bryan E. Veal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Source Core Interrupt Steering
- Publication number 20110153893
- Publication date Jun 23, 2011
- Annie Foong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIMD processing of network packets
- Publication number 20100165991
- Publication date Jul 1, 2010
- Bryan E. Veal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reducing network latency during low power operation
- Publication number 20100131781
- Publication date May 27, 2010
- Mazhar I. Memon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIRECTING DATA UNITS TO A CORE SUPPORTING TASKS
- Publication number 20100083259
- Publication date Apr 1, 2010
- Bryan Veal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMUNICATION BETWEEN PROCESSOR CORE PARTITIONS
- Publication number 20090319705
- Publication date Dec 24, 2009
- Intel Corporation
- Annie Foong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Preserving packet order when migrating network flows between cores
- Publication number 20090213732
- Publication date Aug 27, 2009
- Bryan Veal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
NOTIFICATION OF OUT OF ORDER PACKETS
- Publication number 20090086736
- Publication date Apr 2, 2009
- Annie Foong
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ADAPTIVE RECEIVE SIDE SCALING
- Publication number 20090006521
- Publication date Jan 1, 2009
- Bryan E. Veal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
NETWORK INTERFACE TECHNIQUES
- Publication number 20080086575
- Publication date Apr 10, 2008
- Annie Foong
- G06 - COMPUTING CALCULATING COUNTING

Bryan E. Veal

Person

Patents Grantslast 30 patents

Reducing network latency during low power operation

Memory-addressed maps for persistent storage device

Efficient redundant array of independent disks (RAID) write hole so...

Reducing network latency during low power operation

Source core interrupt steering

Host-managed non-volatile memory

Hash map support in a storage device

Performing an atomic write operation across multiple storage devices

Method, device and system for aggregation of shared address devices

Method and device to augment volatile memory in a graphics subsyste...

Maintaining at least one journal and/or at least one data structure...

Single instruction processing of network packets

Reducing network latency during low power operation

Method and apparatus for synchronizing storage volumes

Directing packets to a processor unit

Single instruction processing of network packets

Source core interrupt steering

Preserving packet order when migrating network flows between cores

Communication between processor core partitions with exclusive read...

Patents Applicationslast 30 patents

MEMORY-ADDRESSED MAPS FOR PERSISTENT STORAGE DEVICE

Techniques for Input/Output Access to Memory or Storage by a Virtua...

REDUCING NETWORK LATENCY DURING LOW POWER OPERATION

HASH MAP SUPPORT IN A STORAGE DEVICE

EFFICIENT REDUNDANT ARRAY OF INDEPENDENT DISKS (RAID) WRITE HOLE SO...

PERFORMING AN ATOMIC WRITE OPERATION ACROSS MULTIPLE STORAGE DEVICES

HOST-MANAGED NON-VOLATILE MEMORY

HASH MAP SUPPORT IN A STORAGE DEVICE

Reducing Network Latency During Low Power Operation

MAINTAINING AT LEAST ONE JOURNAL AND/OR AT LEAST ONE DATA STRUCTURE...

SYSTEM AND METHOD FOR CACHING A STORAGE MEDIUM

A METHOD AND DEVICE TO AUGMENT VOLATILE MEMORY IN A GRAPHICS SUBSYS...

METHOD AND APPARATUS FOR SYNCHRONIZING STORAGE VOLUMES

SINGLE INSTRUCTION PROCESSING OF NETWORK PACKETS

METHOD, DEVICE AND SYSTEM FOR AGGREGATION OF SHARED ADDRESS DEVICES

Source Core Interrupt Steering

Source Core Interrupt Steering

SIMD processing of network packets

Reducing network latency during low power operation

DIRECTING DATA UNITS TO A CORE SUPPORTING TASKS

COMMUNICATION BETWEEN PROCESSOR CORE PARTITIONS

Preserving packet order when migrating network flows between cores

NOTIFICATION OF OUT OF ORDER PACKETS

ADAPTIVE RECEIVE SIDE SCALING

NETWORK INTERFACE TECHNIQUES