Bryan J. Wang

Person

South Lake Tahoe, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Pipelined hardware error classification and handling
- Patent number 12,332,732
- Issue date Jun 17, 2025
- CRYPTOGRAPHY RESEARCH, INC.
- Bryan Jason Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data flow control module for autonomous flow control of multiple DM...
- Patent number 12,229,065
- Issue date Feb 18, 2025
- CRYPTOGRAPHY RESEARCH, INC.
- Winthrop John Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple host memory controller
- Patent number 12,131,067
- Issue date Oct 29, 2024
- RAMBUS INC.
- Thomas J. Thatcher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Batch transfer of commands and data in a secure computer system
- Patent number 11,861,374
- Issue date Jan 2, 2024
- CRYPTOGRAPHY RESEARCH, INC.
- Ashish Raj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Always-on FinFET with camouflaged punch stop implants for protectin...
- Patent number 11,664,332
- Issue date May 30, 2023
- RAMBUS INC.
- Lap Wai Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrically isolated gate contact in FINFET technology for camoufl...
- Patent number 11,637,076
- Issue date Apr 25, 2023
- RAMBUS INC.
- Lap Wai Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Physically unclonable camouflage structure and methods for fabricat...
- Patent number 11,264,990
- Issue date Mar 1, 2022
- RAMBUS INC.
- Ronald P. Cocchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure logic locking and configuration with camouflaged programmabl...
- Patent number 11,163,930
- Issue date Nov 2, 2021
- RAMBUS INC.
- Lap Wai Chow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Camouflaged FinFET and method for producing same
- Patent number 10,923,596
- Issue date Feb 16, 2021
- RAMBUS INC.
- Lap Wai Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for camouflaging an integrated circuit using v...
- Patent number 10,817,638
- Issue date Oct 27, 2020
- Rambus Inc.
- Bryan J. Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure logic locking and configuration with camouflaged programmabl...
- Patent number 10,691,860
- Issue date Jun 23, 2020
- Rambus Inc.
- Lap Wai Chow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physically unclonable camouflage structure and methods for fabricat...
- Patent number 10,574,237
- Issue date Feb 25, 2020
- VERIMATRIX
- Ronald P. Cocchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for camouflaging a standard cell based integra...
- Patent number 9,940,425
- Issue date Apr 10, 2018
- Inside Secure S.A.
- Bryan Jason Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physically unclonable camouflage structure and methods for fabricat...
- Patent number 9,735,781
- Issue date Aug 15, 2017
- Syphermedia International, Inc.
- Ronald P. Cocchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for camouflaging a standard cell based integra...
- Patent number 9,542,520
- Issue date Jan 10, 2017
- Syphermedia International, Inc.
- Bryan Jason Wang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for camouflaging a standard cell based integra...
- Patent number 9,355,199
- Issue date May 31, 2016
- Lap Wai Chow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for camouflaging a standard cell based integra...
- Patent number 8,510,700
- Issue date Aug 13, 2013
- Syphermedia International, Inc.
- Ronald P. Cocchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for camouflaging a standard cell based integra...
- Patent number 8,418,091
- Issue date Apr 9, 2013
- SypherMedia International, Inc.
- Lap Wai Chow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Camouflaging a standard cell based integrated circuit
- Patent number 8,151,235
- Issue date Apr 3, 2012
- SypherMedia International, Inc.
- Lap Wai Chow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Building block for a secure CMOS logic cell library
- Patent number 8,111,089
- Issue date Feb 7, 2012
- Syphermedia International, Inc.
- Ronald P. Cocchi
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
MULTIPLE HOST MEMORY CONTROLLER
- Publication number 20250094087
- Publication date Mar 20, 2025
- CRYPTOGRAPHY RESEARCH, INC.
- Thomas J. THATCHER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OBFUSCATION OF DATA IN A MEMORY
- Publication number 20240211171
- Publication date Jun 27, 2024
- CRYPTOGRAPHY RESEARCH, INC.
- Winthrop John Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIPELINED HARDWARE ERROR CLASSIFICATION AND HANDLING
- Publication number 20230195553
- Publication date Jun 22, 2023
- CRYPTOGRAPHY RESEARCH, INC.
- Bryan Jason Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BATCH TRANSFER OF COMMANDS AND DATA IN A SECURE COMPUTER SYSTEM
- Publication number 20230195477
- Publication date Jun 22, 2023
- CRYPTOGRAPHY RESEARCH, INC.
- Ashish Raj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA FLOW CONTROL MODULE FOR AUTONOMOUS FLOW CONTROL OF MULTIPLE DM...
- Publication number 20230185745
- Publication date Jun 15, 2023
- CRYPTOGRAPHY RESEARCH, INC.
- Winthrop John Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE HOST MEMORY CONTROLLER
- Publication number 20230161506
- Publication date May 25, 2023
- CRYPTOGRAPHY RESEARCH, INC.
- Thomas J. THATCHER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALWAYS-ON FINFET WITH CAMOUFLAGED PUNCH STOP IMPLANTS FOR PROTECTIN...
- Publication number 20210249364
- Publication date Aug 12, 2021
- Rambus Inc.
- Lap Wai Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRICALLY ISOLATED GATE CONTACT IN FINFET TECHNOLOGY FOR CAMOUFL...
- Publication number 20210249363
- Publication date Aug 12, 2021
- Rambus Inc.
- Lap Wai Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SECURE LOGIC LOCKING AND CONFIGURATION WITH CAMOUFLAGED PROGRAMMABL...
- Publication number 20210004515
- Publication date Jan 7, 2021
- Rambus Inc.
- Lap Wai Chow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CAMOUFLAGING AN INTEGRATED CIRCUIT USING V...
- Publication number 20200311222
- Publication date Oct 1, 2020
- INSIDE SECURE
- Bryan J. Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHYSICALLY UNCLONABLE CAMOUFLAGE STRUCTURE AND METHODS FOR FABRICAT...
- Publication number 20200295763
- Publication date Sep 17, 2020
- RAMBUS INC.
- Ronald P. Cocchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OBFUSCATED SHIFT REGISTERS FOR INTEGRATED CIRCUITS
- Publication number 20200285719
- Publication date Sep 10, 2020
- Bryan J. Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CAMOUFLAGED FINFET AND METHOD FOR PRODUCING SAME
- Publication number 20200287040
- Publication date Sep 10, 2020
- INSIDE SECURE
- Lap Wai Chow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND APPARATUS FOR OBFUSCATING AN INTEGRATED CIRCUIT WITH CAM...
- Publication number 20190258766
- Publication date Aug 22, 2019
- INSIDE SECURE
- Bryan J. Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURE LOGIC LOCKING AND CONFIGURATION WITH CAMOUFLAGED PROGRAMMABL...
- Publication number 20180341737
- Publication date Nov 29, 2018
- Lap Wai Chow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHYSICALLY UNCLONABLE CAMOUFLAGE STRUCTURE AND METHODS FOR FABRICAT...
- Publication number 20170359071
- Publication date Dec 14, 2017
- SYPHERMEDIA INTERNATIONAL, INC.
- Ronald P. Cocchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CAMOUFLAGING A STANDARD CELL BASED INTEGRA...
- Publication number 20170091368
- Publication date Mar 30, 2017
- SypherMedia International, Inc.
- Bryan Jason Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHYSICALLY UNCLONABLE CAMOUFLAGE STRUCTURE AND METHODS FOR FABRICAT...
- Publication number 20160197616
- Publication date Jul 7, 2016
- SYPHERMEDIA INTERNATIONAL, INC.
- Ronald P. Cocchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CAMOUFLAGING A STANDARD CELL BASED INTEGRA...
- Publication number 20130191803
- Publication date Jul 25, 2013
- SypherMedia International, Inc.
- Lap Wai Chow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CAMOUFLAGING A STANDARD CELL BASED INTEGRA...
- Publication number 20120139582
- Publication date Jun 7, 2012
- SYPHERMEDIA INTERNATIONAL, INC.
- Ronald P. Cocchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUILDING BLOCK FOR A SECURE CMOS LOGIC CELL LIBRARY
- Publication number 20100301903
- Publication date Dec 2, 2010
- SYPHERMEDIA INTERNATIONAL, INC.
- Ronald P. Cocchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and apparatus for camouflaging a printed circuit board
- Publication number 20100213974
- Publication date Aug 26, 2010
- SypherMedia Interational, Inc.,
- Lap Wai Chow
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CAMOUFLAGING A STANDARD CELL BASED INTEGRA...
- Publication number 20100218158
- Publication date Aug 26, 2010
- SypherMedia International, Inc.
- Lap Wai Chow
- G06 - COMPUTING CALCULATING COUNTING

Bryan J. Wang

Person

Patents Grantslast 30 patents

Pipelined hardware error classification and handling

Data flow control module for autonomous flow control of multiple DM...

Multiple host memory controller

Batch transfer of commands and data in a secure computer system

Always-on FinFET with camouflaged punch stop implants for protectin...

Electrically isolated gate contact in FINFET technology for camoufl...

Physically unclonable camouflage structure and methods for fabricat...

Secure logic locking and configuration with camouflaged programmabl...

Camouflaged FinFET and method for producing same

Method and apparatus for camouflaging an integrated circuit using v...

Secure logic locking and configuration with camouflaged programmabl...

Physically unclonable camouflage structure and methods for fabricat...

Method and apparatus for camouflaging a standard cell based integra...

Physically unclonable camouflage structure and methods for fabricat...

Method and apparatus for camouflaging a standard cell based integra...

Method and apparatus for camouflaging a standard cell based integra...

Method and apparatus for camouflaging a standard cell based integra...

Method and apparatus for camouflaging a standard cell based integra...

Camouflaging a standard cell based integrated circuit

Building block for a secure CMOS logic cell library

Patents Applicationslast 30 patents

MULTIPLE HOST MEMORY CONTROLLER

OBFUSCATION OF DATA IN A MEMORY

PIPELINED HARDWARE ERROR CLASSIFICATION AND HANDLING

BATCH TRANSFER OF COMMANDS AND DATA IN A SECURE COMPUTER SYSTEM

DATA FLOW CONTROL MODULE FOR AUTONOMOUS FLOW CONTROL OF MULTIPLE DM...

MULTIPLE HOST MEMORY CONTROLLER

ALWAYS-ON FINFET WITH CAMOUFLAGED PUNCH STOP IMPLANTS FOR PROTECTIN...

ELECTRICALLY ISOLATED GATE CONTACT IN FINFET TECHNOLOGY FOR CAMOUFL...

SECURE LOGIC LOCKING AND CONFIGURATION WITH CAMOUFLAGED PROGRAMMABL...

METHOD AND APPARATUS FOR CAMOUFLAGING AN INTEGRATED CIRCUIT USING V...

PHYSICALLY UNCLONABLE CAMOUFLAGE STRUCTURE AND METHODS FOR FABRICAT...

OBFUSCATED SHIFT REGISTERS FOR INTEGRATED CIRCUITS

CAMOUFLAGED FINFET AND METHOD FOR PRODUCING SAME

METHOD AND APPARATUS FOR OBFUSCATING AN INTEGRATED CIRCUIT WITH CAM...

SECURE LOGIC LOCKING AND CONFIGURATION WITH CAMOUFLAGED PROGRAMMABL...

PHYSICALLY UNCLONABLE CAMOUFLAGE STRUCTURE AND METHODS FOR FABRICAT...

METHOD AND APPARATUS FOR CAMOUFLAGING A STANDARD CELL BASED INTEGRA...

PHYSICALLY UNCLONABLE CAMOUFLAGE STRUCTURE AND METHODS FOR FABRICAT...

METHOD AND APPARATUS FOR CAMOUFLAGING A STANDARD CELL BASED INTEGRA...

METHOD AND APPARATUS FOR CAMOUFLAGING A STANDARD CELL BASED INTEGRA...

BUILDING BLOCK FOR A SECURE CMOS LOGIC CELL LIBRARY

Method and apparatus for camouflaging a printed circuit board

METHOD AND APPARATUS FOR CAMOUFLAGING A STANDARD CELL BASED INTEGRA...