Buck Gremel

Person

Olympia, WA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Utilization-aware low-overhead link-width modulation for power redu...
- Patent number 9,336,175
- Issue date May 10, 2016
- Intel Corporation
- Ankush Varma
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Utilization-aware low-overhead link-width modulation for power redu...
- Patent number 9,053,244
- Issue date Jun 9, 2015
- Intel Corporation
- Ankush Varma
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method and apparatus for optimizing power and latency on a link
- Patent number 8,935,578
- Issue date Jan 13, 2015
- Intel Corporation
- James W. Alexander
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
General input/output architecture, protocol and related methods to...
- Patent number 7,353,313
- Issue date Apr 1, 2008
- Intel Corporation
- Eric R. Wehage
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for signaling PCI/PCI-X standard hot-plug controller (SHPC)...
- Patent number 7,257,659
- Issue date Aug 14, 2007
- Intel Corporation
- Peter N. Martin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
General input/output architecture, protocol and related methods to...
- Patent number 7,152,128
- Issue date Dec 19, 2006
- Intel Corporation
- Eric R. Wehage
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CONTROLLING AVERAGE POWER LIMITS OF A PROCESSOR
- Publication number 20160147280
- Publication date May 26, 2016
- Tessil Thomas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UTILIZATION-AWARE LOW-OVERHEAD LINK-WIDTH MODULATION FOR POWER REDU...
- Publication number 20150269105
- Publication date Sep 24, 2015
- Intel Corporation
- Ankush Varma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR OPTIMIZING POWER AND LATENCY ON A LINK
- Publication number 20140095944
- Publication date Apr 3, 2014
- James W. Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UTILIZATION-AWARE LOW-OVERHEAD LINK-WIDTH MODULATION FOR POWER REDU...
- Publication number 20140006673
- Publication date Jan 2, 2014
- Ankush Varma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
General input/output architecture, protocol and related methods to...
- Publication number 20070038793
- Publication date Feb 15, 2007
- Eric R. Wehage
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for signaling PCI/PCI-X standard hot-plug controller (SHPC)...
- Publication number 20050149658
- Publication date Jul 7, 2005
- Peter N. Martin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Speculative processing of transaction layer packets
- Publication number 20050144339
- Publication date Jun 30, 2005
- Mahesh U. Wagh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
General input/output architecture, protocol and related methods to...
- Publication number 20030145134
- Publication date Jul 31, 2003
- Eric R. Wehage
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error forwarding in an enhanced general input/output architecture a...
- Publication number 20030115513
- Publication date Jun 19, 2003
- David Harriman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Buck Gremel

Person

Patents Grantslast 30 patents

Utilization-aware low-overhead link-width modulation for power redu...

Utilization-aware low-overhead link-width modulation for power redu...

Method and apparatus for optimizing power and latency on a link

General input/output architecture, protocol and related methods to...

Method for signaling PCI/PCI-X standard hot-plug controller (SHPC)...

General input/output architecture, protocol and related methods to...

Patents Applicationslast 30 patents

CONTROLLING AVERAGE POWER LIMITS OF A PROCESSOR

UTILIZATION-AWARE LOW-OVERHEAD LINK-WIDTH MODULATION FOR POWER REDU...

METHOD AND APPARATUS FOR OPTIMIZING POWER AND LATENCY ON A LINK

UTILIZATION-AWARE LOW-OVERHEAD LINK-WIDTH MODULATION FOR POWER REDU...

General input/output architecture, protocol and related methods to...

Method for signaling PCI/PCI-X standard hot-plug controller (SHPC)...

Speculative processing of transaction layer packets

General input/output architecture, protocol and related methods to...

Error forwarding in an enhanced general input/output architecture a...