Burton Adrik Copeland

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Addison, TX, US

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Patents Grantslast 30 patents

Information Patent Grant
Padding and suppressing rows and columns of data
- Patent number 12,367,147
- Issue date Jul 22, 2025
- Texas Instruments Incorporated
- Asheesh Bhardwaj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit, system, and method for matrix decimation
- Patent number 12,321,747
- Issue date Jun 3, 2025
- Texas Instruments Incorporated
- Asheesh Bhardwaj
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CIRCUIT, SYSTEM, AND METHOD FOR MATRIX DECIMATION
- Publication number 20230297377
- Publication date Sep 21, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Asheesh Bhardwaj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PADDING AND SUPPRESSING ROWS AND COLUMNS OF DATA
- Publication number 20230251970
- Publication date Aug 10, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Asheesh Bhardwaj
- G06 - COMPUTING CALCULATING COUNTING