Cameron D. Patterson

Person

Los Gatos, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Hardware-facilitated secure software execution environment
- Patent number 8,473,754
- Issue date Jun 25, 2013
- Virginia Tech Intellectual Properties, Inc.
- Mark T. Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wires on demand: run-time communication synthesis for reconfigurabl...
- Patent number 7,902,866
- Issue date Mar 8, 2011
- Virginia Tech Intellectual Properties, Inc.
- Cameron Patterson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dynamically connecting modules in a progra...
- Patent number 7,669,168
- Issue date Feb 23, 2010
- Xilinx, Inc.
- Cameron D. Patterson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for identifying essential configuration bits
- Patent number 7,406,673
- Issue date Jul 29, 2008
- Xilinx, Inc.
- Cameron D. Patterson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for generating a bitstream view of a design
- Patent number 7,343,578
- Issue date Mar 11, 2008
- Xilinx, Inc.
- Cameron D. Patterson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of estimating susceptibility to single event upsets for a d...
- Patent number 7,249,010
- Issue date Jul 24, 2007
- Xilinx, Inc.
- Prasanna Sundararajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Core template package for creating run-time reconfigurable cores
- Patent number 7,143,418
- Issue date Nov 28, 2006
- Xilinx, Inc.
- Cameron D. Patterson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integration of a run-time parameterizable core with a static circui...
- Patent number 7,139,995
- Issue date Nov 21, 2006
- Xilinx, Inc.
- Philip B. James-Roxby
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dynamically connecting modules in a progra...
- Patent number 7,124,391
- Issue date Oct 17, 2006
- Xilinx, Inc.
- Cameron D. Patterson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Field programmable gate array (FPGA) configuration data path for mo...
- Patent number 7,080,226
- Issue date Jul 18, 2006
- Xilinx, Inc.
- Cameron D. Patterson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parameterizable and reconfigurable debugger core generators
- Patent number 6,802,026
- Issue date Oct 5, 2004
- Xilinx, Inc.
- Cameron D. Patterson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for defining and modifying connections between...
- Patent number 6,725,441
- Issue date Apr 20, 2004
- Xilinx, Inc.
- Eric R. Keller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hetergeneous method for determining module placement in FPGAs
- Patent number 6,457,164
- Issue date Sep 24, 2002
- Xilinx, Inc.
- L. James Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for structured layout in a hardware description language
- Patent number 6,430,732
- Issue date Aug 6, 2002
- Xilinx, Inc.
- L. James Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for remapping logic modules to resources of a programmable g...
- Patent number 6,408,422
- Issue date Jun 18, 2002
- Xilinx, Inc.
- L. James Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Heterogeneous method for determining module placement in FPGAs
- Patent number 6,243,851
- Issue date Jun 5, 2001
- Xilinx, Inc.
- L. James Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for constraining circuit element positions in structured lay...
- Patent number 6,237,129
- Issue date May 22, 2001
- Xilinx, Inc.
- Cameron D. Patterson
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Hardware-facilitated secure software execution environment
- Publication number 20100122095
- Publication date May 13, 2010
- Mark T. Jones
- G06 - COMPUTING CALCULATING COUNTING

Cameron D. Patterson

Person

Patents Grantslast 30 patents

Hardware-facilitated secure software execution environment

Wires on demand: run-time communication synthesis for reconfigurabl...

Method and apparatus for dynamically connecting modules in a progra...

Method and system for identifying essential configuration bits

Method and system for generating a bitstream view of a design

Methods of estimating susceptibility to single event upsets for a d...

Core template package for creating run-time reconfigurable cores

Integration of a run-time parameterizable core with a static circui...

Method and apparatus for dynamically connecting modules in a progra...

Field programmable gate array (FPGA) configuration data path for mo...

Parameterizable and reconfigurable debugger core generators

Method and apparatus for defining and modifying connections between...

Hetergeneous method for determining module placement in FPGAs

Method for structured layout in a hardware description language

Method for remapping logic modules to resources of a programmable g...

Heterogeneous method for determining module placement in FPGAs

Method for constraining circuit element positions in structured lay...

Patents Applicationslast 30 patents

Hardware-facilitated secure software execution environment