Cameron McNairy

Person

Windsor, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Instruction and logic for machine checking communication
- Patent number 9,842,015
- Issue date Dec 12, 2017
- Intel Corporation
- Ashok Raj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error framework for a microprocesor and system
- Patent number 9,495,233
- Issue date Nov 15, 2016
- Intel Corporation
- Cameron McNairy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technology abstraction layer
- Patent number 9,483,293
- Issue date Nov 1, 2016
- Intel Corporation
- Cameron McNairy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault handling at a transaction level by employing a token and a so...
- Patent number 9,063,855
- Issue date Jun 23, 2015
- Intel Corporation
- Cameron B. McNairy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor design support for computer system and platform vali...
- Patent number 7,487,398
- Issue date Feb 3, 2009
- Intel Corporation
- Ayman G. Abdo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transfer of cache lines on-chip between processing cores in a multi...
- Patent number 7,120,755
- Issue date Oct 10, 2006
- Intel Corporation
- Sujat Jamil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detection of bit errors in maskable content addressable memories
- Patent number 7,100,097
- Issue date Aug 29, 2006
- Hewlett-Packard Development Company, L.P.
- Benjamin J. Patella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor design support for computer system and platform vali...
- Patent number 7,032,134
- Issue date Apr 18, 2006
- Intel Corporation
- Ayman G. Abdo
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Determining an Error Handling Mode
- Publication number 20240370329
- Publication date Nov 7, 2024
- SiFive, Inc.
- Cameron Mcnairy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Making Circuitry Having An Attribute
- Publication number 20240220693
- Publication date Jul 4, 2024
- SiFive, Inc.
- Cameron Mcnairy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Event Recording and Notification Architectures
- Publication number 20240143421
- Publication date May 2, 2024
- SiFive, Inc.
- Cameron Mcnairy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Selecting an Output as a System Output Responsive to an Indication...
- Publication number 20240142518
- Publication date May 2, 2024
- SiFive, Inc.
- Cameron Mcnairy
- G01 - MEASURING TESTING
Information Patent Application
Concept for Handling Transient Errors
- Publication number 20230124832
- Publication date Apr 20, 2023
- William DIETER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STRUCTURE ACCESS PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS
- Publication number 20150134932
- Publication date May 14, 2015
- Cameron B. Mcnairy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction and Logic for Machine Checking Communication
- Publication number 20150095705
- Publication date Apr 2, 2015
- ASHOK RAJ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGY ABSTRACTION LAYER
- Publication number 20140359640
- Publication date Dec 4, 2014
- Cameron McNairy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fault Handling at a Transaction Level by Employing a Token and a So...
- Publication number 20140281747
- Publication date Sep 18, 2014
- Cameron B. McNairy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR FRAMEWORK FOR A MICROPROCESOR AND SYSTEM
- Publication number 20140019814
- Publication date Jan 16, 2014
- Cameron McNairy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Microprocessor design support for computer system and platform vali...
- Publication number 20060107120
- Publication date May 18, 2006
- Intel Corporation
- Ayman G. Abdo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Detection of bit errors in maskable content addressable memories
- Publication number 20040015752
- Publication date Jan 22, 2004
- Benjamin J. Patella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Detection of bit errors in content addressable memories
- Publication number 20040015753
- Publication date Jan 22, 2004
- Benjamin J. Patella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Transfer of cache lines on-chip between processing cores in a multi...
- Publication number 20030126365
- Publication date Jul 3, 2003
- Sujat Jamil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Microprocessor design support for computer system and platform vali...
- Publication number 20020144183
- Publication date Oct 3, 2002
- Ayman G. Abdo
- G06 - COMPUTING CALCULATING COUNTING

Cameron McNairy

Person

Patents Grantslast 30 patents

Instruction and logic for machine checking communication

Error framework for a microprocesor and system

Technology abstraction layer

Fault handling at a transaction level by employing a token and a so...

Microprocessor design support for computer system and platform vali...

Transfer of cache lines on-chip between processing cores in a multi...

Detection of bit errors in maskable content addressable memories

Microprocessor design support for computer system and platform vali...

Patents Applicationslast 30 patents

Determining an Error Handling Mode

Making Circuitry Having An Attribute

Event Recording and Notification Architectures

Selecting an Output as a System Output Responsive to an Indication...

Concept for Handling Transient Errors

STRUCTURE ACCESS PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS

Instruction and Logic for Machine Checking Communication

TECHNOLOGY ABSTRACTION LAYER

Fault Handling at a Transaction Level by Employing a Token and a So...

ERROR FRAMEWORK FOR A MICROPROCESOR AND SYSTEM

Microprocessor design support for computer system and platform vali...

Detection of bit errors in maskable content addressable memories

Detection of bit errors in content addressable memories

Transfer of cache lines on-chip between processing cores in a multi...

Microprocessor design support for computer system and platform vali...