Carsten Hartig

Person

Meerane, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Method for in-die overlay control using FEOL dummy fill layer
- Patent number 10,115,621
- Issue date Oct 30, 2018
- GLOBALFOUNDRIES Inc.
- Peter Moll
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Systems and methods for fabricating semiconductor device structures
- Patent number 9,177,873
- Issue date Nov 3, 2015
- GLOBALFOUNDRIES, INC.
- Alok Vaid
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Inline residual layer detection and characterization post via post...
- Patent number 9,171,765
- Issue date Oct 27, 2015
- GLOBALFOUNDRIES Inc.
- Daniel Fischer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detection of particle contamination on wafers
- Patent number 9,091,667
- Issue date Jul 28, 2015
- GLOBALFOUNDRIES Inc.
- Adam Michal Urbanowicz
- G01 - MEASURING TESTING
Information Patent Grant
Layout for reticle and wafer scanning electron microscope registrat...
- Patent number 9,029,855
- Issue date May 12, 2015
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Guo Xiang Ning
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Systems and methods for fabricating semiconductor device structures...
- Patent number 8,892,237
- Issue date Nov 18, 2014
- GLOBALFOUNDRIES, INC.
- Alok Vaid
- G01 - MEASURING TESTING
Information Patent Grant
Incorporating film optical property measurements into scatterometry...
- Patent number 7,663,766
- Issue date Feb 16, 2010
- Advanced Micro Devices, Inc.
- Carsten Hartig
- G01 - MEASURING TESTING
Information Patent Grant
Method of reducing contamination by removing an interlayer dielectr...
- Patent number 7,410,885
- Issue date Aug 12, 2008
- Advanced Micro Devices, Inc.
- Holger Schuehrer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Technique for forming a passivation layer prior to depositing a bar...
- Patent number 7,259,091
- Issue date Aug 21, 2007
- Advanced Micro Devices, Inc.
- Holger Schuehrer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of compensating for etch rate non-uniformities by ion implan...
- Patent number 7,098,140
- Issue date Aug 29, 2006
- Advanced Micro Devices, Inc.
- Matthias Schaller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of defining the dimensions of circuit elements by using spac...
- Patent number 6,936,383
- Issue date Aug 30, 2005
- Advanced Micro Devices, Inc.
- Martin Mazur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method for wafer-based controlled patterning of features...
- Patent number 6,838,010
- Issue date Jan 4, 2005
- Advanced Micro Devices, Inc.
- Gunter Grasshoff
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die corner alignment structure
- Patent number 6,724,096
- Issue date Apr 20, 2004
- Advanced Micro Devices, Inc.
- Thomas Werner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a substrate contact in a field effect transistor...
- Patent number 6,720,242
- Issue date Apr 13, 2004
- Advanced Micro Devices, Inc.
- Gert Burbach
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR IN-DIE OVERLAY CONTROL USING FEOL DUMMY FILL LAYER
- Publication number 20170330782
- Publication date Nov 16, 2017
- GLOBALFOUNDRIES INC.
- Peter MOLL
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INLINE RESIDUAL LAYER DETECTION AND CHARACTERIZATION POST VIA POST...
- Publication number 20150243568
- Publication date Aug 27, 2015
- GLOBALFOUNDRIES INC.
- Daniel FISCHER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LAYOUT FOR RETICLE AND WAFER SCANNING ELECTRON MICROSCOPE REGISTRAT...
- Publication number 20150221565
- Publication date Aug 6, 2015
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Guo Xiang NING
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DETECTION OF PARTICLE CONTAMINATION ON WAFERS
- Publication number 20150115153
- Publication date Apr 30, 2015
- GLOBALFOUNDRIES INC.
- Adam Michal Urbanowicz
- G01 - MEASURING TESTING
Information Patent Application
SYSTEMS AND METHODS FOR FABRICATING SEMICONDUCTOR DEVICE STRUCTURES
- Publication number 20150033201
- Publication date Jan 29, 2015
- GLOBALFOUNDRIES, Inc.
- Alok Vaid
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LAYOUT FOR RETICLE AND WAFER SCANNING ELECTRON MICROSCOPE REGISTRAT...
- Publication number 20140264334
- Publication date Sep 18, 2014
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Guo Xiang NING
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEMS AND METHODS FOR FABRICATING SEMICONDUCTOR DEVICE STRUCTURES...
- Publication number 20140273299
- Publication date Sep 18, 2014
- GLOBALFOUNDRIES, Inc.
- Alok Vaid
- G01 - MEASURING TESTING
Information Patent Application
INCORPORATING FILM OPTICAL PROPERTY MEASUREMENTS INTO SCATTEROMETRY...
- Publication number 20090059240
- Publication date Mar 5, 2009
- Carsten Hartig
- G01 - MEASURING TESTING
Information Patent Application
METHOD OF REDUCING CONTAMINATION BY REMOVING AN INTERLAYER DIELECTR...
- Publication number 20070026670
- Publication date Feb 1, 2007
- Holger Schuehrer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Technique for forming a passivation layer prior to depositing a bar...
- Publication number 20060024951
- Publication date Feb 2, 2006
- Holger Schuehrer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of compensating for etch rate non-uniformities by ion implan...
- Publication number 20040266200
- Publication date Dec 30, 2004
- Matthias Schaller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and an apparatus for determining the dimension of a feature...
- Publication number 20040084619
- Publication date May 6, 2004
- Carsten Hartig
- G01 - MEASURING TESTING
Information Patent Application
Method of defining the dimensions of circuit elements by using spac...
- Publication number 20040002217
- Publication date Jan 1, 2004
- Martin Mazur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System and method for wafer-based controlled patterning of features...
- Publication number 20030015493
- Publication date Jan 23, 2003
- Gunter Grasshoff
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Die corner alignment structure
- Publication number 20020185753
- Publication date Dec 12, 2002
- Thomas Werner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming a substrate contact in a field effect transistor...
- Publication number 20020055244
- Publication date May 9, 2002
- Gert Burbach
- H01 - BASIC ELECTRIC ELEMENTS

Carsten Hartig

Person

Patents Grantslast 30 patents

Method for in-die overlay control using FEOL dummy fill layer

Systems and methods for fabricating semiconductor device structures

Inline residual layer detection and characterization post via post...

Detection of particle contamination on wafers

Layout for reticle and wafer scanning electron microscope registrat...

Systems and methods for fabricating semiconductor device structures...

Incorporating film optical property measurements into scatterometry...

Method of reducing contamination by removing an interlayer dielectr...

Technique for forming a passivation layer prior to depositing a bar...

Method of compensating for etch rate non-uniformities by ion implan...

Method of defining the dimensions of circuit elements by using spac...

System and method for wafer-based controlled patterning of features...

Die corner alignment structure

Method of forming a substrate contact in a field effect transistor...

Patents Applicationslast 30 patents

METHOD FOR IN-DIE OVERLAY CONTROL USING FEOL DUMMY FILL LAYER

INLINE RESIDUAL LAYER DETECTION AND CHARACTERIZATION POST VIA POST...

LAYOUT FOR RETICLE AND WAFER SCANNING ELECTRON MICROSCOPE REGISTRAT...

DETECTION OF PARTICLE CONTAMINATION ON WAFERS

SYSTEMS AND METHODS FOR FABRICATING SEMICONDUCTOR DEVICE STRUCTURES

LAYOUT FOR RETICLE AND WAFER SCANNING ELECTRON MICROSCOPE REGISTRAT...

SYSTEMS AND METHODS FOR FABRICATING SEMICONDUCTOR DEVICE STRUCTURES...

INCORPORATING FILM OPTICAL PROPERTY MEASUREMENTS INTO SCATTEROMETRY...

METHOD OF REDUCING CONTAMINATION BY REMOVING AN INTERLAYER DIELECTR...

Technique for forming a passivation layer prior to depositing a bar...

Method of compensating for etch rate non-uniformities by ion implan...

Method and an apparatus for determining the dimension of a feature...

Method of defining the dimensions of circuit elements by using spac...

System and method for wafer-based controlled patterning of features...

Die corner alignment structure

Method of forming a substrate contact in a field effect transistor...