Cécile Aulnette

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Guilderland, NY, US

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Patents Grantslast 30 patents

Information Patent Grant
Wafer with intrinsic semiconductor layer
- Patent number 9,177,961
- Issue date Nov 3, 2015
- Soitec
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacture of thin silicon-on-insulator (SOI) structures
- Patent number 8,367,521
- Issue date Feb 5, 2013
- Soitec
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for recycling substrates and fabricating laminated wafers
- Patent number 8,324,075
- Issue date Dec 4, 2012
- Soitec
- Cecile Aulnette
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC

Patents Applicationslast 30 patents

Information Patent Application
WAFER WITH INTRINSIC SEMICONDUCTOR LAYER
- Publication number 20120228689
- Publication date Sep 13, 2012
- SOITEC
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROCESS FOR MANUFACTURING A STRUCTURE COMPRISING A GERMANIUM LAYER...
- Publication number 20110183493
- Publication date Jul 28, 2011
- S.O.I TEC SILICON ON INSULATOR TECHNOLOGIES
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MANUFACTURE OF THIN SILICON-ON-INSULATOR (SOI) STRUCTURES
- Publication number 20110140230
- Publication date Jun 16, 2011
- Nicolas Daval
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR RECYCLING A SUBSTRATE, LAMINATED WATER FABRICATING METHO...
- Publication number 20100181653
- Publication date Jul 22, 2010
- S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES, S.A.
- Cecile Aulnette
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF RECYCLING AN EPITAXIED DONOR WAFER
- Publication number 20100167500
- Publication date Jul 1, 2010
- S.O.TEC SILICON ON INSULATOR TECHNOLOGIES
- Nabil Chhaimi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF RECYCLING AN EPITAXIED DONOR WAFER
- Publication number 20090325362
- Publication date Dec 31, 2009
- Nabil Chhaimi
- H01 - BASIC ELECTRIC ELEMENTS