Cecil Kaplinsky

Person

Palo Alto, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multiprocessor computer systems with command FIFO buffer at each ta...
- Patent number 6,647,450
- Issue date Nov 11, 2003
- Cradle Technologies, Inc.
- Cecil H. Kaplinsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable I/O circuitry defining virtual ports
- Patent number 6,212,591
- Issue date Apr 3, 2001
- Cradle Technologies
- Cecil H. Kaplinsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power, static content addressable memory
- Patent number 6,188,629
- Issue date Feb 13, 2001
- Cecil H. Kaplinsky
- G11 - INFORMATION STORAGE
Information Patent Grant
Driver circuit providing early release and quick bus turn-around
- Patent number 6,114,884
- Issue date Sep 5, 2000
- Cecil H. Kaplinsky
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Inverter-controlled digital interface circuit with dual switching p...
- Patent number 5,920,210
- Issue date Jul 6, 1999
- Cecil H. Kaplinsky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Tristate buffer circuit with transparent latching capability
- Patent number 5,864,244
- Issue date Jan 26, 1999
- Cecil H. Kaplinsky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device with partial switch matrix and bypass mec...
- Patent number 5,796,268
- Issue date Aug 18, 1998
- Cecil H. Kaplinsky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable dynamic line-termination circuit
- Patent number 5,726,583
- Issue date Mar 10, 1998
- Cecil H. Kaplinsky
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low noise tri-state output buffer
- Patent number 5,568,062
- Issue date Oct 22, 1996
- Cecil H. Kaplinsky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital interface circuit with dual switching points for increased...
- Patent number 5,488,322
- Issue date Jan 30, 1996
- Cecil H. Kaplinsky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory system for loading peripherals on power up
- Patent number 5,455,923
- Issue date Oct 3, 1995
- Cecil H. Kaplinsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast CMOS logic with programmable logic control
- Patent number 5,440,247
- Issue date Aug 8, 1995
- Cecil H. Kaplinsky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable macrocell circuit
- Patent number 5,424,654
- Issue date Jun 13, 1995
- Cecil H. Kaplinsky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Write circuit for CMOS latch and memory systems
- Patent number 5,298,816
- Issue date Mar 29, 1994
- Cecil H. Kaplinsky
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock distribution circuit with active de-skewing
- Patent number 5,298,866
- Issue date Mar 29, 1994
- Cecil H. Kaplinsky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device
- Patent number RE34444
- Issue date Nov 16, 1993
- Xilinx, Inc.
- Cecil H. Kaplinsky
- 340 - Communications: electrical
Information Patent Grant
Low power multifunction logic array
- Patent number 5,250,859
- Issue date Oct 5, 1993
- Cecil H. Kaplinsky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable CMOS flip-flop emptying multiplexers
- Patent number 5,164,612
- Issue date Nov 17, 1992
- Cecil H. Kaplinsky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System having a host independent input/output processor for control...
- Patent number 5,131,081
- Issue date Jul 14, 1992
- North American Philips Corp., Signetics Div.
- Craig A. MacKenna
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device with programmable inverters at input/outp...
- Patent number 5,028,821
- Issue date Jul 2, 1991
- Plus Logic, Inc.
- Cecil H. Kaplinsky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device with ganged output pins
- Patent number 5,023,606
- Issue date Jun 11, 1991
- Plus Logic, Inc.
- Cecil H. Kaplinsky
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Logic gates with a programmable number of inputs
- Patent number 5,012,135
- Issue date Apr 30, 1991
- Plus Logic, Inc.
- Cecil H. Kaplinsky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-channel data communications controller
- Patent number 4,975,828
- Issue date Dec 4, 1990
- Cirrus Logic, Inc.
- John Wishneusky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic expander
- Patent number 4,967,107
- Issue date Oct 30, 1990
- Plus Logic, Inc.
- Cecil H. Kaplinsky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configuration control circuit for programmable logic devices
- Patent number 4,940,909
- Issue date Jul 10, 1990
- Plus Logic, Inc.
- Theodor Mulder
- G01 - MEASURING TESTING
Information Patent Grant
Data processing apparatus for time-interleaved execution of a plura...
- Patent number 4,853,845
- Issue date Aug 1, 1989
- U.S. Philips Corporation
- Gunther A. H. Zimmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device
- Patent number 4,847,612
- Issue date Jul 11, 1989
- Plug Logic, Inc.
- Cecil H. Kaplinsky
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Raster scan video controller with programmable prioritized sharing...
- Patent number 4,782,462
- Issue date Nov 1, 1988
- Signetics Corporation
- Cecil H. Kaplinsky
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Guarded regions for controlling memory access
- Patent number 4,677,546
- Issue date Jun 30, 1987
- Signetics
- Martin Freeman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory access controller
- Patent number 4,669,043
- Issue date May 26, 1987
- Signetics Corporation
- Cecil H. Kaplinsky
- G06 - COMPUTING CALCULATING COUNTING

Cecil Kaplinsky

Person

Patents Grantslast 30 patents

Multiprocessor computer systems with command FIFO buffer at each ta...

Configurable I/O circuitry defining virtual ports

Low power, static content addressable memory

Driver circuit providing early release and quick bus turn-around

Inverter-controlled digital interface circuit with dual switching p...

Tristate buffer circuit with transparent latching capability

Programmable logic device with partial switch matrix and bypass mec...

Programmable dynamic line-termination circuit

Low noise tri-state output buffer

Digital interface circuit with dual switching points for increased...

Memory system for loading peripherals on power up

Fast CMOS logic with programmable logic control

Programmable macrocell circuit

Write circuit for CMOS latch and memory systems

Clock distribution circuit with active de-skewing

Programmable logic device

Low power multifunction logic array

Programmable CMOS flip-flop emptying multiplexers

System having a host independent input/output processor for control...

Programmable logic device with programmable inverters at input/outp...

Programmable logic device with ganged output pins

Logic gates with a programmable number of inputs

Multi-channel data communications controller

Programmable logic expander

Configuration control circuit for programmable logic devices

Data processing apparatus for time-interleaved execution of a plura...

Programmable logic device

Raster scan video controller with programmable prioritized sharing...

Guarded regions for controlling memory access

Memory access controller