Cesar Talledo

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Flexible routing engine for a PCI express switch and method of use
- Patent number 9,025,495
- Issue date May 5, 2015
- David Alan Brown
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for translated routing in an interconnect switch
- Patent number 8,995,302
- Issue date Mar 31, 2015
- PMC-Sierra US, Inc.
- David Alan Brown
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
PCI express switch and method for multi-port non-transparent switching
- Patent number 8,429,325
- Issue date Apr 23, 2013
- Integrated Device Technology Inc.
- Peter Z. Onufryk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
In-situ monitor of process and device parameters in integrated circ...
- Patent number 7,583,087
- Issue date Sep 1, 2009
- Integrated Device Technology, Inc.
- David J. Pilling
- G11 - INFORMATION STORAGE
Information Patent Grant
External observation and control of data in a computing processor
- Patent number 7,353,345
- Issue date Apr 1, 2008
- Integated Device Technology, Inc.
- Peter Zenon Onufryk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit systems and devices having high precision digita...
- Patent number 7,203,126
- Issue date Apr 10, 2007
- Integrated Device Technology, Inc.
- Robert J. Proebsting
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock processing logic and method for determining clock signal char...
- Patent number 7,061,294
- Issue date Jun 13, 2006
- Integrated Device Technology, Inc.
- Cesar A. Talledo
- G11 - INFORMATION STORAGE
Information Patent Grant
Transaction aligner microarchitecture
- Patent number 7,016,987
- Issue date Mar 21, 2006
- Integrated Device Technology, Inc.
- Agha B. Hussain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit devices having high precision digital delay line...
- Patent number 6,944,070
- Issue date Sep 13, 2005
- Integrated Device Technology, Inc.
- Robert J. Proebsting
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock processing logic and method for determining clock signal char...
- Patent number 6,867,630
- Issue date Mar 15, 2005
- Integrated Device Technology, Inc.
- Cesar A. Talledo
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit devices having high precision digital delay line...
- Patent number 6,856,558
- Issue date Feb 15, 2005
- Integrated Device Technology, Inc.
- Robert J. Proebsting
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method for generating a compensated percent-of-clock...
- Patent number 6,664,838
- Issue date Dec 16, 2003
- Integrated Device Technology, Inc.
- Cesar A. Talledo
- G11 - INFORMATION STORAGE
Information Patent Grant
Fly-by support module for a peripheral bus
- Patent number 6,662,258
- Issue date Dec 9, 2003
- Integrated Device Technology, Inc.
- Jeffrey Lukanc
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
In-situ monitor of process and device parameters in integrated circ...
- Publication number 20060190790
- Publication date Aug 24, 2006
- David J. Pilling
- G01 - MEASURING TESTING
Information Patent Application
Integrated circuit systems and devices having high precision digita...
- Publication number 20050206426
- Publication date Sep 22, 2005
- Robert J. Proebsting
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Transaction aligner microarchitecture
- Publication number 20030018837
- Publication date Jan 23, 2003
- Agha B. Hussain
- G06 - COMPUTING CALCULATING COUNTING

Cesar Talledo

Person

Patents Grantslast 30 patents

Flexible routing engine for a PCI express switch and method of use

Method and apparatus for translated routing in an interconnect switch

PCI express switch and method for multi-port non-transparent switching

In-situ monitor of process and device parameters in integrated circ...

External observation and control of data in a computing processor

Integrated circuit systems and devices having high precision digita...

Clock processing logic and method for determining clock signal char...

Transaction aligner microarchitecture

Integrated circuit devices having high precision digital delay line...

Clock processing logic and method for determining clock signal char...

Integrated circuit devices having high precision digital delay line...

Apparatus and method for generating a compensated percent-of-clock...

Fly-by support module for a peripheral bus

Patents Applicationslast 30 patents

In-situ monitor of process and device parameters in integrated circ...

Integrated circuit systems and devices having high precision digita...

Transaction aligner microarchitecture