Chandrasekhar Nagarajan

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Memory sub-system for decoding non-power-of-two addressable unit ad...
- Patent number 11,928,055
- Issue date Mar 12, 2024
- Micron Technology, Inc.
- Patrick A. La Fratta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory sub-system for decoding non-power-of-two addressable unit ad...
- Patent number 11,507,504
- Issue date Nov 22, 2022
- Micron Technology, Inc.
- Patrick A. La Fratta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory sub-system for decoding non-power-of-two addressable unit ad...
- Patent number 11,016,885
- Issue date May 25, 2021
- Micron Technology, Inc.
- Patrick A. La Fratta
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORY SUB-SYSTEM FOR DECODING NON-POWER-OF-TWO ADDRESSABLE UNIT AD...
- Publication number 20230053291
- Publication date Feb 16, 2023
- Micron Technology. Inc/
- Patrick A. La Fratta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SUB-SYSTEM FOR DECODING NON-POWER-OF-TWO ADDRESSABLE UNIT AD...
- Publication number 20210227361
- Publication date Jul 22, 2021
- Micron Technology, Inc.
- Patrick A. La Fratta
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MEMORY SUB-SYSTEM FOR DECODING NON-POWER-OF-TWO ADDRESSABLE UNIT AD...
- Publication number 20200272562
- Publication date Aug 27, 2020
- Micron Technology, Inc.
- Patrick A. La Fratta
- G06 - COMPUTING CALCULATING COUNTING