Changhyun Lee

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Programming memory cells at two different levels in parallel
- Patent number 11,615,838
- Issue date Mar 28, 2023
- Micron Technology, Inc.
- Changhyun Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device including multiple select gates and different bias co...
- Patent number 11,335,404
- Issue date May 17, 2022
- Micron Technology, Inc.
- Akira Goda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programming memory cells where higher levels are programmed prior t...
- Patent number 11,295,809
- Issue date Apr 5, 2022
- Micron Technology, Inc.
- Changhyun Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming multiple-level memory cells with multiple-pass
- Patent number 10,839,896
- Issue date Nov 17, 2020
- Micron Technology, Inc.
- Changhyun Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device including multiple select gates and different bias co...
- Patent number 10,818,357
- Issue date Oct 27, 2020
- Micron Technology, Inc.
- Akira Goda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device including multiple select gates and different bias co...
- Patent number 10,360,979
- Issue date Jul 23, 2019
- Micron Technology, Inc.
- Akira Goda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selective body reset operation for three dimensional (3D) NAND memory
- Patent number 10,176,880
- Issue date Jan 8, 2019
- Intel Corporation
- Changhyun Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device including multiple select gates and different bias co...
- Patent number 10,026,480
- Issue date Jul 17, 2018
- Micron Technology, Inc.
- Akira Goda
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated structures
- Patent number 9,966,451
- Issue date May 8, 2018
- Micron Technology, Inc.
- Changhyun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated structures comprising charge-storage regions along outer...
- Patent number 9,905,575
- Issue date Feb 27, 2018
- Micron Technology, Inc.
- Changhyun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated structures
- Patent number 9,773,882
- Issue date Sep 26, 2017
- Micron Technology, Inc.
- Changhyun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated structures comprising charge-storage regions along outer...
- Patent number 9,748,265
- Issue date Aug 29, 2017
- Micron Technology, Inc.
- Changhyun Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device including multiple select gates and different bias co...
- Patent number 9,728,266
- Issue date Aug 8, 2017
- Micron Technology, Inc.
- Akira Goda
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
PROGRAMMING MEMORY CELLS OF MEMORY DEVICES
- Publication number 20220208261
- Publication date Jun 30, 2022
- Micron Technology, Inc.
- Changhyun Lee
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING MULTIPLE SELECT GATES AND DIFFERENT BIAS CO...
- Publication number 20210125669
- Publication date Apr 29, 2021
- Micron Technology, Inc.
- Akira Goda
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMING MEMORY CELLS OF MEMORY DEVICES
- Publication number 20210035630
- Publication date Feb 4, 2021
- Micron Technology, Inc.
- Changhyun Lee
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMING MEMORY CELLS OF MEMORY DEVICES
- Publication number 20200202927
- Publication date Jun 25, 2020
- Micron Technology, Inc.
- Changhyun Lee
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING MULTIPLE SELECT GATES AND DIFFERENT BIAS CO...
- Publication number 20200051638
- Publication date Feb 13, 2020
- Micron Technology, Inc.
- Akira Goda
- G11 - INFORMATION STORAGE
Information Patent Application
SELECTIVE BODY RESET OPERATION FOR THREE DIMENSIONAL (3D) NAND MEMORY
- Publication number 20190006013
- Publication date Jan 3, 2019
- Intel Corporation
- Changhyun Lee
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING MULTIPLE SELECT GATES AND DIFFERENT BIAS CO...
- Publication number 20180342298
- Publication date Nov 29, 2018
- Micron Technology, Inc.
- Akira Goda
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING MULTIPLE SELECT GATES AND DIFFERENT BIAS CO...
- Publication number 20180012660
- Publication date Jan 11, 2018
- Micron Technology, Inc.
- Akira Goda
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Structures Comprising Charge-Storage Regions Along Outer...
- Publication number 20170352681
- Publication date Dec 7, 2017
- Micron Technology, Inc.
- Changhyun Lee
- H01 - BASIC ELECTRIC ELEMENTS

Changhyun Lee

Person

Patents Grantslast 30 patents

Programming memory cells at two different levels in parallel

Memory device including multiple select gates and different bias co...

Programming memory cells where higher levels are programmed prior t...

Programming multiple-level memory cells with multiple-pass

Memory device including multiple select gates and different bias co...

Memory device including multiple select gates and different bias co...

Selective body reset operation for three dimensional (3D) NAND memory

Memory device including multiple select gates and different bias co...

Integrated structures

Integrated structures comprising charge-storage regions along outer...

Integrated structures

Integrated structures comprising charge-storage regions along outer...

Memory device including multiple select gates and different bias co...

Patents Applicationslast 30 patents

PROGRAMMING MEMORY CELLS OF MEMORY DEVICES

MEMORY DEVICE INCLUDING MULTIPLE SELECT GATES AND DIFFERENT BIAS CO...

PROGRAMMING MEMORY CELLS OF MEMORY DEVICES

PROGRAMMING MEMORY CELLS OF MEMORY DEVICES

MEMORY DEVICE INCLUDING MULTIPLE SELECT GATES AND DIFFERENT BIAS CO...

SELECTIVE BODY RESET OPERATION FOR THREE DIMENSIONAL (3D) NAND MEMORY

MEMORY DEVICE INCLUDING MULTIPLE SELECT GATES AND DIFFERENT BIAS CO...

MEMORY DEVICE INCLUDING MULTIPLE SELECT GATES AND DIFFERENT BIAS CO...

Integrated Structures Comprising Charge-Storage Regions Along Outer...