Charles A. Cornell

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Pulsed state retention power gating flip-flop
- Patent number 8,289,060
- Issue date Oct 16, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Samuel J. Tower
- G11 - INFORMATION STORAGE
Information Patent Grant
Linearized digital phase-locked loop method for maintaining end of...
- Patent number 7,826,581
- Issue date Nov 2, 2010
- Cypress Semiconductor Corporation
- Stephen M. Prather
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuitry and method for buffering a power mode control signal
- Patent number 7,683,697
- Issue date Mar 23, 2010
- FREESCALE SEMICONDUCTOR, INC.
- Matthew S. Berzins
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Flip-flop having logic state retention during a power down mode and...
- Patent number 7,583,121
- Issue date Sep 1, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Matthew S. Berzins
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit and method for rapid power up of a differential output driver
- Patent number 7,394,293
- Issue date Jul 1, 2008
- Cypress Semiconductor Corp.
- Jeffrey Waldrip
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit and method for CMOS voltage level translation
- Patent number 7,239,178
- Issue date Jul 3, 2007
- Cypress Semiconductor Corp.
- Charles A. Cornell
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low duty cycle distortion differential to CMOS translator
- Patent number 7,176,720
- Issue date Feb 13, 2007
- Cypress Semiconductor Corp.
- Stephen M. Prather
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for differential signal detection
- Patent number 6,781,465
- Issue date Aug 24, 2004
- Cypress Semiconductor Corp.
- Matthew S. Berzins
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Asynchronous random access memory with power optimizing clock
- Patent number 6,683,818
- Issue date Jan 27, 2004
- Cypress Semiconductor Corp.
- Charles A. Cornell
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
CIRCUITRY AND METHOD FOR BUFFERING A POWER MODE CONTROL SIGNAL
- Publication number 20090295467
- Publication date Dec 3, 2009
- Matthew S. Berzins
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FLIP-FLOP HAVING LOGIC STATE RETENTION DURING A POWER DOWN MODE AND...
- Publication number 20090058485
- Publication date Mar 5, 2009
- Matthew S. Berzins
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PULSED STATE RETENTION POWER GATING FLIP-FLOP
- Publication number 20080315932
- Publication date Dec 25, 2008
- Samuel J. Tower
- H03 - BASIC ELECTRONIC CIRCUITRY

Charles A. Cornell

Person

Patents Grantslast 30 patents

Pulsed state retention power gating flip-flop

Linearized digital phase-locked loop method for maintaining end of...

Circuitry and method for buffering a power mode control signal

Flip-flop having logic state retention during a power down mode and...

Circuit and method for rapid power up of a differential output driver

Circuit and method for CMOS voltage level translation

Low duty cycle distortion differential to CMOS translator

Method and apparatus for differential signal detection

Asynchronous random access memory with power optimizing clock

Patents Applicationslast 30 patents

CIRCUITRY AND METHOD FOR BUFFERING A POWER MODE CONTROL SIGNAL

FLIP-FLOP HAVING LOGIC STATE RETENTION DURING A POWER DOWN MODE AND...

PULSED STATE RETENTION POWER GATING FLIP-FLOP