Charles AUGUSTINE

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Unified retention and wake-up clamp apparatus and method
- Patent number 12,007,826
- Issue date Jun 11, 2024
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Energy efficient memory array with optimized burst read and write d...
- Patent number 11,908,542
- Issue date Feb 20, 2024
- Intel Corporation
- Charles Augustine
- G11 - INFORMATION STORAGE
Information Patent Grant
Distributed and scalable all-digital low dropout integrated voltage...
- Patent number 11,774,919
- Issue date Oct 3, 2023
- Intel Corporation
- Suyoung Bang
- G05 - CONTROLLING REGULATING
Information Patent Grant
Concurrent compute and ECC for in-memory matrix vector operations
- Patent number 11,513,893
- Issue date Nov 29, 2022
- Intel Corporation
- Somnath Paul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ultra-deep compute static random access memory with high compute th...
- Patent number 11,450,672
- Issue date Sep 20, 2022
- Intel Corporation
- Charles Augustine
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
All-digital closed loop voltage generator
- Patent number 11,320,888
- Issue date May 3, 2022
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
All-digital voltage monitor (ADVM) with single-cycle latency
- Patent number 11,211,935
- Issue date Dec 28, 2021
- Intel Corporation
- Suyoung Bang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for multi-read and multi-write of memory circuit
- Patent number 11,176,994
- Issue date Nov 16, 2021
- Intel Corporation
- Muhammad M. Khellah
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus, video processing unit and method for clustering events i...
- Patent number 10,892,012
- Issue date Jan 12, 2021
- Intel Corporation
- Turbo Majumder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Post synaptic potential-based learning rule
- Patent number 10,878,313
- Issue date Dec 29, 2020
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
All-digital voltage monitor (ADVM) with single-cycle latency
- Patent number 10,784,874
- Issue date Sep 22, 2020
- Intel Corporation
- Suyoung Bang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for multi-read and multi-write of memory circuit
- Patent number 10,755,771
- Issue date Aug 25, 2020
- Intel Corporation
- Muhammad M. Khellah
- G11 - INFORMATION STORAGE
Information Patent Grant
Pre-synaptic learning using delayed causal updates
- Patent number 10,748,060
- Issue date Aug 18, 2020
- Intel Corporation
- Somnath Paul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system of temporal-domain feature extraction for automat...
- Patent number 10,665,222
- Issue date May 26, 2020
- Intel Corporation
- Suyoung Bang
- G10 - MUSICAL INSTRUMENTS ACOUSTICS
Information Patent Grant
Technologies for memory management of neural networks with sparse c...
- Patent number 10,635,968
- Issue date Apr 28, 2020
- Intel Corporation
- Somnath Paul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitcell state retention
- Patent number 10,600,462
- Issue date Mar 24, 2020
- Intel Corporation
- Charles Augustine
- G11 - INFORMATION STORAGE
Information Patent Grant
Neuromorphic computing device, memory device, system, and method to...
- Patent number 10,586,147
- Issue date Mar 10, 2020
- Intel Corporation
- Wei Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid compression scheme for efficient storage of synaptic weights...
- Patent number 10,489,702
- Issue date Nov 26, 2019
- Intel Corporation
- Somnath Paul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calibrated biasing of sleep transistor in integrated circuits
- Patent number 10,454,476
- Issue date Oct 22, 2019
- Intel Corporation
- Suyoung Bang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Flip-flop circuit with low-leakage transistors
- Patent number 10,423,203
- Issue date Sep 24, 2019
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detecting keywords in audio using a spiking neural network
- Patent number 10,403,266
- Issue date Sep 3, 2019
- Intel Corporation
- Muhammad Khellah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power retention flip-flop with level-sensitive scan circuitry
- Patent number 10,374,584
- Issue date Aug 6, 2019
- Intel Corporation
- Charles Augustine
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Magnetic storage cell memory with back hop-prevention
- Patent number 10,297,302
- Issue date May 21, 2019
- Intel Corporation
- Charles Augustine
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses, methods, and systems for stochastic memory circuits us...
- Patent number 9,953,690
- Issue date Apr 24, 2018
- Intel Corporation
- Charles Augustine
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for detecting single flip-error in a complemen...
- Patent number 9,934,082
- Issue date Apr 3, 2018
- Intel Corporation
- Shigeki Tomishima
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Physically unclonable function circuit using resistive memory device
- Patent number 9,916,884
- Issue date Mar 13, 2018
- Intel Corporation
- Charles Augustine
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus to reduce retention failure in complementary resistive me...
- Patent number 9,830,988
- Issue date Nov 28, 2017
- Intel Corporation
- Charles Augustine
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell with retention using resistive memory
- Patent number 9,805,790
- Issue date Oct 31, 2017
- Intel Corporation
- Nathaniel J. August
- G11 - INFORMATION STORAGE
Information Patent Grant
Physically unclonable function circuit including memory elements
- Patent number 9,762,241
- Issue date Sep 12, 2017
- Intel Corporation
- Charles Augustine
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatuses, methods, and systems for stochastic memory circuits us...
- Patent number 9,734,880
- Issue date Aug 15, 2017
- Intel Corporation
- Charles Augustine
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
RESONATOR AGING TRACKING
- Publication number 20250047290
- Publication date Feb 6, 2025
- Renzhi Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
N-P BALANCED MULTI-PORT REGISTER FILE WITH COMPLEMENTARY FIELD-EFFE...
- Publication number 20240331761
- Publication date Oct 3, 2024
- Intel Corporation
- Charles Augustine
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-TRANSISTOR EMBEDDED DYNAMIC RANDOM ACCESS MEMORY GAIN CELL IN...
- Publication number 20240161817
- Publication date May 16, 2024
- Charles Augustine
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-PORTED REGISTER FILE WITH CFETS
- Publication number 20240053987
- Publication date Feb 15, 2024
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SRAM WITH P-TYPE ACCESS TRANSISTORS AND COMPLEMENTARY FIELD-EFFECT...
- Publication number 20230284427
- Publication date Sep 7, 2023
- Intel Corporation
- Charles AUGUSTINE
- G11 - INFORMATION STORAGE
Information Patent Application
UNIFIED RETENTION AND WAKE-UP CLAMP APPARATUS AND METHOD
- Publication number 20220091652
- Publication date Mar 24, 2022
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALL-DIGITAL VOLTAGE MONITOR (ADVM) WITH SINGLE-CYCLE LATENCY
- Publication number 20210242872
- Publication date Aug 5, 2021
- Intel Corporation
- Suyoung Bang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DISTRIBUTED AND SCALABLE ALL-DIGITAL LOW DROPOUT INTEGRATED VOLTAGE...
- Publication number 20210240142
- Publication date Aug 5, 2021
- Intel Corporation
- Suyoung Bang
- G05 - CONTROLLING REGULATING
Information Patent Application
ENERGY EFFICIENT MEMORY ARRAY WITH OPTIMIZED BURST READ AND WRITE D...
- Publication number 20210193196
- Publication date Jun 24, 2021
- Intel Corporation
- Charles Augustine
- G11 - INFORMATION STORAGE
Information Patent Application
CONCURRENT COMPUTE AND ECC FOR IN-MEMORY MATRIX VECTOR OPERATIONS
- Publication number 20210109809
- Publication date Apr 15, 2021
- Intel Corporation
- Somnath Paul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR MULTI-READ AND MULTI-WRITE OF MEMORY CIRCUIT
- Publication number 20210043251
- Publication date Feb 11, 2021
- Intel Corporation
- Muhammad M. Khellah
- G11 - INFORMATION STORAGE
Information Patent Application
ULTRA-DEEP COMPUTE STATIC RANDOM ACCESS MEMORY WITH HIGH COMPUTE TH...
- Publication number 20200258890
- Publication date Aug 13, 2020
- Intel Corporation
- Charles AUGUSTINE
- G11 - INFORMATION STORAGE
Information Patent Application
NEAREST NEIGHBOR SEARCH LOGIC CIRCUIT WITH REDUCED LATENCY AND POWE...
- Publication number 20200183922
- Publication date Jun 11, 2020
- Intel Corporation
- Wootaek LIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NVRAM SYSTEM MEMORY WITH MEMORY SIDE CACHE THAT FAVORS WRITTEN TO I...
- Publication number 20200133884
- Publication date Apr 30, 2020
- Intel Corporation
- Zeshan A. CHISHTI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALL-DIGITAL CLOSED LOOP VOLTAGE GENERATOR
- Publication number 20200081512
- Publication date Mar 12, 2020
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM OF EVENT-DRIVEN OBJECT SEGMENTATION FOR IMAGE PRO...
- Publication number 20200005468
- Publication date Jan 2, 2020
- Intel Corporation
- Somnath Paul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH DENSITY NEGATIVE DIFFERENTIAL RESISTANCE BASED MEMORY
- Publication number 20190385657
- Publication date Dec 19, 2019
- Intel Corporation
- Charles Augustine
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR MULTI-READ AND MULTI-WRITE OF MEMORY CIRCUIT
- Publication number 20190198093
- Publication date Jun 27, 2019
- Intel Corporation
- Muhammad M. Khellah
- G11 - INFORMATION STORAGE
Information Patent Application
DETECTING KEYWORDS IN AUDIO USING A SPIKING NEURAL NETWORK
- Publication number 20190115011
- Publication date Apr 18, 2019
- Intel Corporation
- Muhammad Khellah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CALIBRATED BIASING OF SLEEP TRANSISTOR IN INTEGRATED CIRCUITS
- Publication number 20190044512
- Publication date Feb 7, 2019
- Intel Corporation
- Suyoung Bang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND SYSTEM OF TEMPORAL-DOMAIN FEATURE EXTRACTION FOR AUTOMAT...
- Publication number 20190043477
- Publication date Feb 7, 2019
- Intel Corporation
- Suyoung Bang
- G10 - MUSICAL INSTRUMENTS ACOUSTICS
Information Patent Application
CLUSTERING EVENTS IN A CONTENT ADDRESSABLE MEMORY
- Publication number 20190043583
- Publication date Feb 7, 2019
- Intel Corporation
- Turbo MAJUMDER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POST SYNAPTIC POTENTIAL-BASED LEARNING RULE
- Publication number 20180322384
- Publication date Nov 8, 2018
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLIP-FLOP CIRCUIT WITH LOW-LEAKAGE TRANSISTORS
- Publication number 20180181175
- Publication date Jun 28, 2018
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRE-SYNAPTIC LEARNING USING DELAYED CAUSAL UPDATES
- Publication number 20180107922
- Publication date Apr 19, 2018
- Intel Corporation
- Somnath Paul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID COMPRESSION SCHEME FOR EFFICIENT STORAGE OF SYNAPTIC WEIGHTS...
- Publication number 20180107919
- Publication date Apr 19, 2018
- Intel Corporation
- Somnath Paul
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEUROMORPHIC COMPUTING DEVICE, MEMORY DEVICE, SYSTEM, AND METHOD TO...
- Publication number 20180082176
- Publication date Mar 22, 2018
- Intel Corporation
- Wei WU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES, METHODS, AND SYSTEMS FOR STOCHASTIC MEMORY CIRCUITS US...
- Publication number 20170365313
- Publication date Dec 21, 2017
- Intel Corporation
- Charles Augustine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BITCELL STATE RETENTION
- Publication number 20170337958
- Publication date Nov 23, 2017
- Intel Corporation
- Charles AUGUSTINE
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNOLOGIES FOR MEMORY MANAGEMENT OF NEURAL NETWORKS WITH SPARSE C...
- Publication number 20170277628
- Publication date Sep 28, 2017
- Somnath Paul
- G06 - COMPUTING CALCULATING COUNTING

Charles AUGUSTINE

Person

Patents Grantslast 30 patents

Unified retention and wake-up clamp apparatus and method

Energy efficient memory array with optimized burst read and write d...

Distributed and scalable all-digital low dropout integrated voltage...

Concurrent compute and ECC for in-memory matrix vector operations

Ultra-deep compute static random access memory with high compute th...

All-digital closed loop voltage generator

All-digital voltage monitor (ADVM) with single-cycle latency

Techniques for multi-read and multi-write of memory circuit

Apparatus, video processing unit and method for clustering events i...

Post synaptic potential-based learning rule

All-digital voltage monitor (ADVM) with single-cycle latency

Techniques for multi-read and multi-write of memory circuit

Pre-synaptic learning using delayed causal updates

Method and system of temporal-domain feature extraction for automat...

Technologies for memory management of neural networks with sparse c...

Bitcell state retention

Neuromorphic computing device, memory device, system, and method to...

Hybrid compression scheme for efficient storage of synaptic weights...

Calibrated biasing of sleep transistor in integrated circuits

Flip-flop circuit with low-leakage transistors

Detecting keywords in audio using a spiking neural network

Low power retention flip-flop with level-sensitive scan circuitry

Magnetic storage cell memory with back hop-prevention

Apparatuses, methods, and systems for stochastic memory circuits us...

Apparatus and method for detecting single flip-error in a complemen...

Physically unclonable function circuit using resistive memory device

Apparatus to reduce retention failure in complementary resistive me...

Memory cell with retention using resistive memory

Physically unclonable function circuit including memory elements

Apparatuses, methods, and systems for stochastic memory circuits us...

Patents Applicationslast 30 patents

RESONATOR AGING TRACKING

N-P BALANCED MULTI-PORT REGISTER FILE WITH COMPLEMENTARY FIELD-EFFE...

THREE-TRANSISTOR EMBEDDED DYNAMIC RANDOM ACCESS MEMORY GAIN CELL IN...

MULTI-PORTED REGISTER FILE WITH CFETS

SRAM WITH P-TYPE ACCESS TRANSISTORS AND COMPLEMENTARY FIELD-EFFECT...

UNIFIED RETENTION AND WAKE-UP CLAMP APPARATUS AND METHOD

ALL-DIGITAL VOLTAGE MONITOR (ADVM) WITH SINGLE-CYCLE LATENCY

DISTRIBUTED AND SCALABLE ALL-DIGITAL LOW DROPOUT INTEGRATED VOLTAGE...

ENERGY EFFICIENT MEMORY ARRAY WITH OPTIMIZED BURST READ AND WRITE D...

CONCURRENT COMPUTE AND ECC FOR IN-MEMORY MATRIX VECTOR OPERATIONS

TECHNIQUES FOR MULTI-READ AND MULTI-WRITE OF MEMORY CIRCUIT

ULTRA-DEEP COMPUTE STATIC RANDOM ACCESS MEMORY WITH HIGH COMPUTE TH...

NEAREST NEIGHBOR SEARCH LOGIC CIRCUIT WITH REDUCED LATENCY AND POWE...

NVRAM SYSTEM MEMORY WITH MEMORY SIDE CACHE THAT FAVORS WRITTEN TO I...

ALL-DIGITAL CLOSED LOOP VOLTAGE GENERATOR

METHOD AND SYSTEM OF EVENT-DRIVEN OBJECT SEGMENTATION FOR IMAGE PRO...

HIGH DENSITY NEGATIVE DIFFERENTIAL RESISTANCE BASED MEMORY

TECHNIQUES FOR MULTI-READ AND MULTI-WRITE OF MEMORY CIRCUIT

DETECTING KEYWORDS IN AUDIO USING A SPIKING NEURAL NETWORK

CALIBRATED BIASING OF SLEEP TRANSISTOR IN INTEGRATED CIRCUITS

METHOD AND SYSTEM OF TEMPORAL-DOMAIN FEATURE EXTRACTION FOR AUTOMAT...

CLUSTERING EVENTS IN A CONTENT ADDRESSABLE MEMORY

POST SYNAPTIC POTENTIAL-BASED LEARNING RULE

FLIP-FLOP CIRCUIT WITH LOW-LEAKAGE TRANSISTORS

PRE-SYNAPTIC LEARNING USING DELAYED CAUSAL UPDATES

HYBRID COMPRESSION SCHEME FOR EFFICIENT STORAGE OF SYNAPTIC WEIGHTS...

NEUROMORPHIC COMPUTING DEVICE, MEMORY DEVICE, SYSTEM, AND METHOD TO...

APPARATUSES, METHODS, AND SYSTEMS FOR STOCHASTIC MEMORY CIRCUITS US...

BITCELL STATE RETENTION

TECHNOLOGIES FOR MEMORY MANAGEMENT OF NEURAL NETWORKS WITH SPARSE C...