Charles C. Chiang

Person

Saratoga, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Lithographic hotspot detection using multiple machine learning kernels
- Patent number 11,403,564
- Issue date Aug 2, 2022
- Synopsys, Inc.
- Charles C. Chiang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DRC-based hotspot detection considering edge tolerance and incomple...
- Patent number 9,594,867
- Issue date Mar 14, 2017
- Synopsys, Inc.
- Yen Ting Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distance metric for accurate lithographic hotspot classification us...
- Patent number 9,098,649
- Issue date Aug 4, 2015
- Synopsys, Inc.
- Charles C. Chiang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Preconditioning for EDA cell library
- Patent number 8,635,580
- Issue date Jan 21, 2014
- Synopsys, Inc.
- Xin Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accurate process hotspot detection using critical design rule extra...
- Patent number 8,601,419
- Issue date Dec 3, 2013
- Synopsys, Inc.
- Charles C. Chiang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distance metric for accurate lithographic hotspot classification us...
- Patent number 8,490,030
- Issue date Jul 16, 2013
- Synopsys, Inc.
- Charles C. Chiang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Range pattern matching for hotspots containing vias and incompletel...
- Patent number 8,452,075
- Issue date May 28, 2013
- Synopsys, Inc.
- Jingyu Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Preconditioning for EDA cell library
- Patent number 8,286,121
- Issue date Oct 9, 2012
- Synopsys, Inc.
- Xin Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Range pattern definition of susceptibility of layout regions to fab...
- Patent number 8,219,941
- Issue date Jul 10, 2012
- Synopsys, Inc.
- Subarnarekha Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Identifying layout regions susceptible to fabrication issues by usi...
- Patent number 8,209,639
- Issue date Jun 26, 2012
- Synopsys, Inc.
- Subarnarekha Sinha
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Fast evaluation of average critical area for IC layouts
- Patent number 8,205,179
- Issue date Jun 19, 2012
- Synopsys, Inc.
- Qing Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast evaluation of average critical area for IC layouts
- Patent number 8,205,185
- Issue date Jun 19, 2012
- Synopsys, Inc.
- Qing Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for computing dummy feature density for chemic...
- Patent number 8,176,456
- Issue date May 8, 2012
- Synopsys, Inc.
- Xin Wang
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Steiner tree based approach for polygon fracturing
- Patent number 8,151,236
- Issue date Apr 3, 2012
- Synopsys, Inc.
- Qing Su
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method and apparatus for performing RLC modeling and extraction for...
- Patent number 8,146,032
- Issue date Mar 27, 2012
- Synopsys, Inc.
- Qiushi Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for identifying and correcting phase conflicts
- Patent number 8,141,007
- Issue date Mar 20, 2012
- Synopsys, Inc.
- Subarnarekha Sinha
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method and system for facilitating floorplanning for 3D IC
- Patent number 8,006,212
- Issue date Aug 23, 2011
- Synopsys, Inc.
- Subarnarekha Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Predicting IC manufacturing yield by considering both systematic an...
- Patent number 8,000,826
- Issue date Aug 16, 2011
- Synopsys, Inc.
- Jianfeng Luo
- G05 - CONTROLLING REGULATING
Information Patent Grant
Fast evaluation of average critical area for ic layouts
- Patent number 7,962,873
- Issue date Jun 14, 2011
- Synopsys, Inc.
- Qing Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast evaluation of average critical area for IC layouts
- Patent number 7,962,882
- Issue date Jun 14, 2011
- Synopsys, Inc.
- Qing Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Lithography suspect spot location and scoring system
- Patent number 7,823,099
- Issue date Oct 26, 2010
- Synopsys, Inc.
- Min-Chun Tsai
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Predicting IC manufacturing yield based on hotspots
- Patent number 7,707,526
- Issue date Apr 27, 2010
- Synopsys, Inc.
- Qing Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Range pattern definition of susceptibility of layout regions to fab...
- Patent number 7,703,067
- Issue date Apr 20, 2010
- Synopsys, Inc.
- Subarnarekha Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Preconditioning for EDA cell library
- Patent number 7,644,378
- Issue date Jan 5, 2010
- Synopsys, Inc.
- Xin Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for computing dummy feature density for chemic...
- Patent number 7,594,213
- Issue date Sep 22, 2009
- Synopsys, Inc.
- Xin Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to reduce random yield loss
- Patent number 7,543,255
- Issue date Jun 2, 2009
- Synopsys, Inc.
- Subarnarekha Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dummy filling technique for improved planarization of chip surface...
- Patent number 7,509,622
- Issue date Mar 24, 2009
- Synopsys, Inc.
- Subarnarekha Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Identifying layout regions susceptible to fabrication issues by usi...
- Patent number 7,503,029
- Issue date Mar 10, 2009
- Synopsys, Inc.
- Subarnarekha Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for identifying and correcting phase conflicts
- Patent number 7,496,883
- Issue date Feb 24, 2009
- Synopsys, Inc.
- Subarnarekha Sinha
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Fast evaluation of average critical area for IC layouts
- Patent number 7,346,865
- Issue date Mar 18, 2008
- Synopsys, Inc.
- Qing Su
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
LITHOGRAPHIC HOTSPOT DETECTION USING MULTIPLE MACHINE LEARNING KERNELS
- Publication number 20190287021
- Publication date Sep 19, 2019
- Synopsys, Inc.
- Charles C. Chiang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRC-Based Hotspot Detection Considering Edge Tolerance And Incomple...
- Publication number 20160125120
- Publication date May 5, 2016
- Synopsys, Inc.
- Yen Ting Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LITHOGRAPHIC HOTSPOT DETECTION USING MULTIPLE MACHINE LEARNING KERNELS
- Publication number 20140358830
- Publication date Dec 4, 2014
- Synopsys, Inc.
- Charles C. Chiang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Distance Metric For Accurate Lithographic Hotspot Classification Us...
- Publication number 20130326435
- Publication date Dec 5, 2013
- Charles C. Chiang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Preconditioning For EDA Cell Library
- Publication number 20130013276
- Publication date Jan 10, 2013
- Synopsys, Inc.
- Xin Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR PERFORMING RLC MODELING AND EXTRACTION FOR...
- Publication number 20100199236
- Publication date Aug 5, 2010
- Synopsys, Inc.
- Qiushi Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Preconditioning For EDA Cell Library
- Publication number 20100070938
- Publication date Mar 18, 2010
- Synopsys, Inc.
- Xin Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR FACILITATING FLOORPLANNING FOR 3D IC
- Publication number 20100031217
- Publication date Feb 4, 2010
- Synopsys, Inc.
- Subarnarekha Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAST EVALUATION OF AVERAGE CRITICAL AREA FOR IC LAYOUTS
- Publication number 20090307641
- Publication date Dec 10, 2009
- Synopsys, Inc.
- Qing Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAST EVALUATION OF AVERAGE CRITICAL AREA FOR IC LAYOUTS
- Publication number 20090307644
- Publication date Dec 10, 2009
- Synopsys, Inc.
- Qing Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STEINER TREE BASED APPROACH FOR POLYGON FRACTURING
- Publication number 20090187876
- Publication date Jul 23, 2009
- Synopsis, Inc.
- Qing Su
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
METHOD AND APPARATUS FOR IDENTIFYING AND CORRECTING PHASE CONFLICTS
- Publication number 20090150850
- Publication date Jun 11, 2009
- Synopsys, Inc.
- Subarnarekha Sinha
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
IDENTIFYING LAYOUT REGIONS SUSCEPTIBLE TO FABRICATION ISSUES BY USI...
- Publication number 20090138835
- Publication date May 28, 2009
- Subarnarekha Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RANGE PATTERN DEFINITION OF SUSCEPTIBILITY OF LAYOUT REGIONS TO FAB...
- Publication number 20090132980
- Publication date May 21, 2009
- Subarnarekha Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR COMPUTING DUMMY FEATURE DENSITY FOR CHEMIC...
- Publication number 20090106725
- Publication date Apr 23, 2009
- Synopsys, Inc.
- Xin Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Lithography Suspect Spot Location and Scoring System
- Publication number 20080301623
- Publication date Dec 4, 2008
- Synopsys, Inc.
- Min-Chun Tsai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Predicting IC manufacturing yield based on hotspots
- Publication number 20080295046
- Publication date Nov 27, 2008
- Qing Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Range pattern matching for hotspots containing vias and incompletel...
- Publication number 20080253644
- Publication date Oct 16, 2008
- Jingyu Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAST EVALUATION OF AVERAGE CRITICAL AREA FOR IC
- Publication number 20080216028
- Publication date Sep 4, 2008
- Synopsys, Inc.
- Qing Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAST EVALUATION OF AVERAGE CRITICAL AREA FOR IC
- Publication number 20080148196
- Publication date Jun 19, 2008
- Synopsys, Inc.
- Qing Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dummy Filling Technique For Improved Planarization Of Chip Surface...
- Publication number 20070245284
- Publication date Oct 18, 2007
- Synopsys Inc.
- Subarnarekha Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Range pattern definition of susceptibility of layout regions to fab...
- Publication number 20070240086
- Publication date Oct 11, 2007
- SYNOPSYS, INC.
- Subarnarekha Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Identifying layout regions susceptible to fabrication issues by usi...
- Publication number 20070234246
- Publication date Oct 4, 2007
- SYNOPSYS, INC.
- Subarnarekha Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus to reduce random yield loss
- Publication number 20070192751
- Publication date Aug 16, 2007
- Subarnarekha Sinha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Predicting IC manufacturing yield by considering both systematic an...
- Publication number 20070174797
- Publication date Jul 26, 2007
- Jianfeng Luo
- G05 - CONTROLLING REGULATING
Information Patent Application
Simulating topography of a conductive material in a semiconductor w...
- Publication number 20070118320
- Publication date May 24, 2007
- SYNOPSYS, INC.
- Jianfeng Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for identifying and correcting phase conflicts
- Publication number 20060199083
- Publication date Sep 7, 2006
- Subarnarekha Sinha
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Fast evaluation of average critical area for IC layouts
- Publication number 20060095877
- Publication date May 4, 2006
- Synopsys, Inc.
- Qing Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Preconditioning for EDA cell library
- Publication number 20060057594
- Publication date Mar 16, 2006
- Synopsys, Inc.
- Xin Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for computing dummy feature density for Chemic...
- Publication number 20050114824
- Publication date May 26, 2005
- Xin Wang
- G06 - COMPUTING CALCULATING COUNTING

Charles C. Chiang

Person

Patents Grantslast 30 patents

Lithographic hotspot detection using multiple machine learning kernels

DRC-based hotspot detection considering edge tolerance and incomple...

Distance metric for accurate lithographic hotspot classification us...

Preconditioning for EDA cell library

Accurate process hotspot detection using critical design rule extra...

Distance metric for accurate lithographic hotspot classification us...

Range pattern matching for hotspots containing vias and incompletel...

Preconditioning for EDA cell library

Range pattern definition of susceptibility of layout regions to fab...

Identifying layout regions susceptible to fabrication issues by usi...

Fast evaluation of average critical area for IC layouts

Fast evaluation of average critical area for IC layouts

Method and apparatus for computing dummy feature density for chemic...

Steiner tree based approach for polygon fracturing

Method and apparatus for performing RLC modeling and extraction for...

Method and apparatus for identifying and correcting phase conflicts

Method and system for facilitating floorplanning for 3D IC

Predicting IC manufacturing yield by considering both systematic an...

Fast evaluation of average critical area for ic layouts

Fast evaluation of average critical area for IC layouts

Lithography suspect spot location and scoring system

Predicting IC manufacturing yield based on hotspots

Range pattern definition of susceptibility of layout regions to fab...

Preconditioning for EDA cell library

Method and apparatus for computing dummy feature density for chemic...

Method and apparatus to reduce random yield loss

Dummy filling technique for improved planarization of chip surface...

Identifying layout regions susceptible to fabrication issues by usi...

Method and apparatus for identifying and correcting phase conflicts

Fast evaluation of average critical area for IC layouts

Patents Applicationslast 30 patents

LITHOGRAPHIC HOTSPOT DETECTION USING MULTIPLE MACHINE LEARNING KERNELS

DRC-Based Hotspot Detection Considering Edge Tolerance And Incomple...

LITHOGRAPHIC HOTSPOT DETECTION USING MULTIPLE MACHINE LEARNING KERNELS

Distance Metric For Accurate Lithographic Hotspot Classification Us...

Preconditioning For EDA Cell Library

METHOD AND APPARATUS FOR PERFORMING RLC MODELING AND EXTRACTION FOR...

Preconditioning For EDA Cell Library

METHOD AND SYSTEM FOR FACILITATING FLOORPLANNING FOR 3D IC

FAST EVALUATION OF AVERAGE CRITICAL AREA FOR IC LAYOUTS

FAST EVALUATION OF AVERAGE CRITICAL AREA FOR IC LAYOUTS

STEINER TREE BASED APPROACH FOR POLYGON FRACTURING

METHOD AND APPARATUS FOR IDENTIFYING AND CORRECTING PHASE CONFLICTS

IDENTIFYING LAYOUT REGIONS SUSCEPTIBLE TO FABRICATION ISSUES BY USI...

RANGE PATTERN DEFINITION OF SUSCEPTIBILITY OF LAYOUT REGIONS TO FAB...

METHOD AND APPARATUS FOR COMPUTING DUMMY FEATURE DENSITY FOR CHEMIC...

Lithography Suspect Spot Location and Scoring System

Predicting IC manufacturing yield based on hotspots

Range pattern matching for hotspots containing vias and incompletel...

FAST EVALUATION OF AVERAGE CRITICAL AREA FOR IC

FAST EVALUATION OF AVERAGE CRITICAL AREA FOR IC

Dummy Filling Technique For Improved Planarization Of Chip Surface...

Range pattern definition of susceptibility of layout regions to fab...

Identifying layout regions susceptible to fabrication issues by usi...

Method and apparatus to reduce random yield loss

Predicting IC manufacturing yield by considering both systematic an...

Simulating topography of a conductive material in a semiconductor w...

Method and apparatus for identifying and correcting phase conflicts

Fast evaluation of average critical area for IC layouts

Preconditioning for EDA cell library

Method and apparatus for computing dummy feature density for Chemic...