Charles H. Moore

Person

Woodside, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
High performance microprocessor having variable speed system clock
- Patent number 6,598,148
- Issue date Jul 22, 2003
- Patriot Scientific Corporation
- Charles H. Moore
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance microprocessor having variable speed system clock
- Patent number 5,809,336
- Issue date Sep 15, 1998
- Patriot Scientific Corporation
- Charles H. Moore
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance microprocessor using instructions that operate wit...
- Patent number 5,784,584
- Issue date Jul 21, 1998
- Patriot Scientific Corporation
- Charles H. Moore
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor system with hierarchical stack and method of operation
- Patent number 5,659,703
- Issue date Aug 19, 1997
- Patriot Scientific Corporation
- Charles H. Moore
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing system having load dependent bus timing
- Patent number 5,604,915
- Issue date Feb 18, 1997
- Nanotronics Corporation
- Charles H. Moore
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance, low cost microprocessor
- Patent number 5,530,890
- Issue date Jun 25, 1996
- Nanotronics Corporation
- Charles H. Moore
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance, low cost microprocessor architecture
- Patent number 5,440,749
- Issue date Aug 8, 1995
- Nanotronics Corporation
- Charles H. Moore
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
FORTH specific language microprocessor
- Patent number 5,319,757
- Issue date Jun 7, 1994
- Harris Corporation
- Charles H. Moore
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Forth specific language microprocessor
- Patent number 5,070,451
- Issue date Dec 3, 1991
- Harris Corporation
- Charles H. Moore
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Transferring data between registers in a RISC microprocessor archit...
- Publication number 20080091920
- Publication date Apr 17, 2008
- George W. Shaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Using breakpoints for debugging in a RISC microprocessor architecture
- Publication number 20080077911
- Publication date Mar 27, 2008
- George W. Shaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Floating point exception handling in a risc microprocessor architec...
- Publication number 20080072021
- Publication date Mar 20, 2008
- George W. Shaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Using trap routines in a RISC microprocessor architecture
- Publication number 20080071991
- Publication date Mar 20, 2008
- George W. Shaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Availability of space in a RISC microprocessor architecture
- Publication number 20070271441
- Publication date Nov 22, 2007
- George W. Shaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Detecting the boundaries of memory in a RISC microprocessor archite...
- Publication number 20070271442
- Publication date Nov 22, 2007
- George W. Shaw
- G06 - COMPUTING CALCULATING COUNTING

Charles H. Moore

Person

Patents Grantslast 30 patents

High performance microprocessor having variable speed system clock

High performance microprocessor having variable speed system clock

High performance microprocessor using instructions that operate wit...

Microprocessor system with hierarchical stack and method of operation

Data processing system having load dependent bus timing

High performance, low cost microprocessor

High performance, low cost microprocessor architecture

FORTH specific language microprocessor

Forth specific language microprocessor

Patents Applicationslast 30 patents

Transferring data between registers in a RISC microprocessor archit...

Using breakpoints for debugging in a RISC microprocessor architecture

Floating point exception handling in a risc microprocessor architec...

Using trap routines in a RISC microprocessor architecture

Availability of space in a RISC microprocessor architecture

Detecting the boundaries of memory in a RISC microprocessor archite...