Charles L. Johnson

Person

Stewartville, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
High-performance hash joins using memory with extensive internal pa...
- Patent number 9,817,612
- Issue date Nov 14, 2017
- International Business Machines Corporation
- Jeffrey H. Derby
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-performance hash joins using memory with extensive internal pa...
- Patent number 9,811,287
- Issue date Nov 7, 2017
- International Business Machines Corporation
- Jeffrey H. Derby
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Universal inter-layer interconnect for multi-layer semiconductor st...
- Patent number 9,495,498
- Issue date Nov 15, 2016
- GLOBALFOUNDRIES Inc.
- Gerald K. Bartley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Horizontally aligned graphite nanofibers in etched silicon wafer tr...
- Patent number 9,245,813
- Issue date Jan 26, 2016
- International Business Machines Corporation
- Gerald K. Bartley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Horizontally and vertically aligned graphite nanofibers thermal int...
- Patent number 9,111,899
- Issue date Aug 18, 2015
- Lenovo
- Gerald K. Bartley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid bonding techniques for multi-layer semiconductor stacks
- Patent number 8,736,068
- Issue date May 27, 2014
- International Business Machines Corporation
- Gerald K. Bartley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thermal enhancement for multi-layer semiconductor stacks
- Patent number 8,445,918
- Issue date May 21, 2013
- International Business Machines Corporation
- Gerald K. Bartley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for internal layer-layer thermal enhancement
- Patent number 8,367,478
- Issue date Feb 5, 2013
- International Business Machines Corporation
- Gerald K. Bartley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Color printer calibration for multiple mediums
- Patent number 8,358,440
- Issue date Jan 22, 2013
- Ricoh Production Print Solutions LLC
- Larry M. Ernst
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Universal inter-layer interconnect for multi-layer semiconductor st...
- Patent number 8,330,489
- Issue date Dec 11, 2012
- International Business Machines Corporation
- Gerald K. Bartley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid bonding techniques for multi-layer semiconductor stacks
- Patent number 8,293,578
- Issue date Oct 23, 2012
- International Business Machines Corporation
- Gerald K. Bartley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three dimensional chip fabrication
- Patent number 8,140,297
- Issue date Mar 20, 2012
- International Business Machines Corporation
- Gerald K. Bartley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Intelligent cache injection
- Patent number 8,127,079
- Issue date Feb 28, 2012
- International Business Machines Corporation
- Timothy H. Heil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for controlling a remote printer
- Patent number 7,283,272
- Issue date Oct 16, 2007
- InfoPrint Solutions Company
- Charles D. Johnson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System for two-dimensional and three-dimensional imaging of tubular...
- Patent number 6,928,314
- Issue date Aug 9, 2005
- Mayo Foundation for Medical Education and Research
- Charles D. Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system and program for detecting communication code informa...
- Patent number 6,871,285
- Issue date Mar 22, 2005
- International Business Machines Corporation
- Dennis Michael Carney
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
SRAM that can be clocked on either clock phase
- Patent number 6,260,164
- Issue date Jul 10, 2001
- International Business Machines Corporation
- Anthony Gus Aipperspach
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for single phase clock distribution with minim...
- Patent number 5,911,063
- Issue date Jun 8, 1999
- International Business Machines Corporation
- David Howard Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for two dimensional and three dimensional imaging of tubular...
- Patent number 5,891,030
- Issue date Apr 6, 1999
- Mayo Foundation for Medical Education and Research
- Charles Daniel Johnson
- A61 - MEDICAL OR VETERINARY SCIENCE HYGIENE
Information Patent Grant
Apparatus and method to change a processor clock frequency
- Patent number 5,815,694
- Issue date Sep 29, 1998
- International Business Machines Corporation
- Paul Allen Ganfield
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined memory interface and method for using the same
- Patent number 5,790,838
- Issue date Aug 4, 1998
- International Business Machines Corporation
- John David Irish
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for providing an uninterrupted clock signal in...
- Patent number 5,371,764
- Issue date Dec 6, 1994
- International Business Machines Corporation
- Ronald D. Gillingham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing clock skew in large-scale integrated circuits
- Patent number 5,235,521
- Issue date Aug 10, 1993
- International Business Machines Corporation
- Charles L. Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing clock skew in large-scale integrated circuits
- Patent number 5,077,676
- Issue date Dec 31, 1991
- International Business Machines Corporation
- Charles L. Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
VLSI performance compensation for off-chip drivers and clock genera...
- Patent number 4,939,389
- Issue date Jul 3, 1990
- International Business Machines Corporation
- Dennis T. Cox
- G01 - MEASURING TESTING
Information Patent Grant
Noise control in an integrated circuit chip
- Patent number 4,857,765
- Issue date Aug 15, 1989
- International Business Machines Corporation
- Joseph J. Cahill
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Substrate wiring patterns for connecting to integrated-circuit chips
- Patent number 4,495,377
- Issue date Jan 22, 1985
- International Business Machines Corporation
- Charles L. Johnson
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
HIGH-PERFORMANCE HASH JOINS USING MEMORY WITH EXTENSIVE INTERNAL PA...
- Publication number 20160147450
- Publication date May 26, 2016
- International Business Machines Corporation
- Jeffrey H. Derby
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH-PERFORMANCE HASH JOINS USING MEMORY WITH EXTENSIVE INTERNAL PA...
- Publication number 20160147451
- Publication date May 26, 2016
- International Business Machines Corporation
- Jeffrey H. Derby
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HORIZONTALLY ALIGNED GRAPHITE NANOFIBERS IN ETCHED SILICON WAFER TR...
- Publication number 20140210068
- Publication date Jul 31, 2014
- International Business Machines Corporation
- Gerald K. Bartley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HORIZONTALLY AND VERTICALLY ALIGNED GRAPHITE NANOFIBERS THERMAL INT...
- Publication number 20140070393
- Publication date Mar 13, 2014
- International Business Machines Corporation
- Gerald K. Bartley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
UNIVERSAL INTER-LAYER INTERCONNECT FOR MULTI-LAYER SEMICONDUCTOR ST...
- Publication number 20130009324
- Publication date Jan 10, 2013
- International Business Machines Corporation
- Gerald K. Bartley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID BONDING TECHNIQUES FOR MULTI-LAYER SEMICONDUCTOR STACKS
- Publication number 20130011968
- Publication date Jan 10, 2013
- International Business Machines Corporation
- Gerald K. Bartley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND SYSTEM FOR INTERNAL LAYER-LAYER THERMAL ENHANCEMENT
- Publication number 20120306088
- Publication date Dec 6, 2012
- International Business Machines Corporation
- Gerald K. BARTLEY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
UNIVERSAL INTER-LAYER INTERCONNECT FOR MULTI-LAYER SEMICONDUCTOR ST...
- Publication number 20120198406
- Publication date Aug 2, 2012
- International Business Machines Corporation
- Gerald K. Bartley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID BONDING TECHNIQUES FOR MULTI-LAYER SEMICONDUCTOR STACKS
- Publication number 20120187570
- Publication date Jul 26, 2012
- International Business Machines Corporation
- Gerald K. Bartley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HYBRID BONDING TECHNIQUES FOR MULTI-LAYER SEMICONDUCTOR STACKS
- Publication number 20120098140
- Publication date Apr 26, 2012
- International Business Machines Corporation
- Gerald K. Bartley
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THERMAL ENHANCEMENT FOR MULTI-LAYER SEMICONDUCTOR STACKS
- Publication number 20120038057
- Publication date Feb 16, 2012
- International Business Machines Corporation
- Gerald K. Bartley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COLOR PRINTER CALIBRATION FOR MULTIPLE MEDIUMS
- Publication number 20110063633
- Publication date Mar 17, 2011
- Larry M. Ernst
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Universal Inter-Layer Interconnect for Multi-Layer Semiconductor St...
- Publication number 20100271071
- Publication date Oct 28, 2010
- International Business Machines Corporation
- Gerald K. Bartley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREE DIMENSIONAL CHIP FABRICATION
- Publication number 20100185410
- Publication date Jul 22, 2010
- International Business Machines Corporation
- GERALD K. BARTLEY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTELLIGENT CACHE INJECTION
- Publication number 20100185819
- Publication date Jul 22, 2010
- International Business Machines Corporation
- TIMOTHY H. HEIL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for controlling a remote printer
- Publication number 20040196492
- Publication date Oct 7, 2004
- International Business Machines Corporation
- Charles D. Johnson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Charles L. Johnson

Person

Patents Grantslast 30 patents

High-performance hash joins using memory with extensive internal pa...

High-performance hash joins using memory with extensive internal pa...

Universal inter-layer interconnect for multi-layer semiconductor st...

Horizontally aligned graphite nanofibers in etched silicon wafer tr...

Horizontally and vertically aligned graphite nanofibers thermal int...

Hybrid bonding techniques for multi-layer semiconductor stacks

Thermal enhancement for multi-layer semiconductor stacks

Method and system for internal layer-layer thermal enhancement

Color printer calibration for multiple mediums

Universal inter-layer interconnect for multi-layer semiconductor st...

Hybrid bonding techniques for multi-layer semiconductor stacks

Three dimensional chip fabrication

Intelligent cache injection

System and method for controlling a remote printer

System for two-dimensional and three-dimensional imaging of tubular...

Method, system and program for detecting communication code informa...

SRAM that can be clocked on either clock phase

Method and apparatus for single phase clock distribution with minim...

System for two dimensional and three dimensional imaging of tubular...

Apparatus and method to change a processor clock frequency

Pipelined memory interface and method for using the same

Method and apparatus for providing an uninterrupted clock signal in...

Reducing clock skew in large-scale integrated circuits

Reducing clock skew in large-scale integrated circuits

VLSI performance compensation for off-chip drivers and clock genera...

Noise control in an integrated circuit chip

Substrate wiring patterns for connecting to integrated-circuit chips

Patents Applicationslast 30 patents

HIGH-PERFORMANCE HASH JOINS USING MEMORY WITH EXTENSIVE INTERNAL PA...

HIGH-PERFORMANCE HASH JOINS USING MEMORY WITH EXTENSIVE INTERNAL PA...

HORIZONTALLY ALIGNED GRAPHITE NANOFIBERS IN ETCHED SILICON WAFER TR...

HORIZONTALLY AND VERTICALLY ALIGNED GRAPHITE NANOFIBERS THERMAL INT...

UNIVERSAL INTER-LAYER INTERCONNECT FOR MULTI-LAYER SEMICONDUCTOR ST...

HYBRID BONDING TECHNIQUES FOR MULTI-LAYER SEMICONDUCTOR STACKS

METHOD AND SYSTEM FOR INTERNAL LAYER-LAYER THERMAL ENHANCEMENT

UNIVERSAL INTER-LAYER INTERCONNECT FOR MULTI-LAYER SEMICONDUCTOR ST...

HYBRID BONDING TECHNIQUES FOR MULTI-LAYER SEMICONDUCTOR STACKS

HYBRID BONDING TECHNIQUES FOR MULTI-LAYER SEMICONDUCTOR STACKS

THERMAL ENHANCEMENT FOR MULTI-LAYER SEMICONDUCTOR STACKS

COLOR PRINTER CALIBRATION FOR MULTIPLE MEDIUMS

Universal Inter-Layer Interconnect for Multi-Layer Semiconductor St...

THREE DIMENSIONAL CHIP FABRICATION

INTELLIGENT CACHE INJECTION

System and method for controlling a remote printer