Charles Philip Roth

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus to manage power consumption of a semiconductor...
- Patent number 8,112,048
- Issue date Feb 7, 2012
- Marvell World Trade Ltd.
- Amit Dor
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Programmable power transition counter
- Patent number 7,529,958
- Issue date May 5, 2009
- Charles Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-cycle instructions
- Patent number 7,472,259
- Issue date Dec 30, 2008
- Analog Devices, Inc.
- Gregory A. Overkamp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to manage power consumption of a semiconductor...
- Patent number 7,379,718
- Issue date May 27, 2008
- Marvell World Trade Ltd.
- Amit Dor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient emulation instruction dispatch based on instruction width
- Patent number 7,366,876
- Issue date Apr 29, 2008
- Analog Devices, Inc.
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable width alignment engine for aligning instructions based on...
- Patent number 7,360,059
- Issue date Apr 15, 2008
- Analog Devices, Inc.
- Thomas Tomazin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Early exception detection
- Patent number 7,272,705
- Issue date Sep 18, 2007
- Analog Devices, Inc.
- Juan G. Revilla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data synchronization for a test access port
- Patent number 7,168,032
- Issue date Jan 23, 2007
- Intel Corporation
- Charles P. Roth
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
FIFO write/LIFO read trace buffer with software and hardware loop c...
- Patent number 7,155,570
- Issue date Dec 26, 2006
- Intel Corporation
- Ravi P. Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling the timing of test modes in a multiple processor system
- Patent number 7,100,033
- Issue date Aug 29, 2006
- Intel Corporation
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Aligning instructions using a variable width alignment engine havin...
- Patent number 7,082,516
- Issue date Jul 25, 2006
- Intel Corporation
- Thomas Tomazin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decode and dispatch of multi-issue and multiple width instructions
- Patent number 7,069,420
- Issue date Jun 27, 2006
- Intel Corporation
- Gregory A. Overkamp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware loops and pipeline system using advanced generation of loo...
- Patent number 7,065,636
- Issue date Jun 20, 2006
- Intel Corporation
- Ryo Inoue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self-nesting interrupts
- Patent number 7,043,582
- Issue date May 9, 2006
- Intel Corporation
- Ravi P. Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Valid bit generation and tracking in a pipelined processor
- Patent number 7,036,000
- Issue date Apr 25, 2006
- Intel Corporation
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor stalling
- Patent number 7,028,165
- Issue date Apr 11, 2006
- Intel Corporation
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single-step processing and selecting debugging modes
- Patent number 6,986,026
- Issue date Jan 10, 2006
- Intel Corporation
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decoding an instruction portion and forwarding part of the portion...
- Patent number 6,976,151
- Issue date Dec 13, 2005
- Intel Corporation
- Gregory A. Overkamp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Maintaining even and odd array pointers to extreme values by search...
- Patent number 6,948,056
- Issue date Sep 20, 2005
- Intel Corporation
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Early exception detection
- Patent number 6,920,515
- Issue date Jul 19, 2005
- Intel Corporation
- Juan G. Revilla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register adjustment based on adjustment values determined at multip...
- Patent number 6,920,547
- Issue date Jul 19, 2005
- Intel Corporation
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware loops
- Patent number 6,898,693
- Issue date May 24, 2005
- Intel Corporation
- Ravi P. Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Event handling
- Patent number 6,842,812
- Issue date Jan 11, 2005
- Intel Corporation
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Watchpoint engine for a pipelined processor
- Patent number 6,829,701
- Issue date Dec 7, 2004
- Intel Corporation
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Exception handling using an exception pipeline in a pipelined proce...
- Patent number 6,823,448
- Issue date Nov 23, 2004
- Intel Corporation
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction address generation and tracking in a pipelined processor
- Patent number 6,789,184
- Issue date Sep 7, 2004
- Intel Corporation
- Ravi P. Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor reset and instruction fetches
- Patent number 6,789,187
- Issue date Sep 7, 2004
- Intel Corporation
- Ravi P. Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware loops
- Patent number 6,766,444
- Issue date Jul 20, 2004
- Intel Corporation
- Ravi P. Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Security on hardware loops
- Patent number 6,763,453
- Issue date Jul 13, 2004
- Intel Corporation
- Ravi P. Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Event vector table override
- Patent number 6,760,800
- Issue date Jul 6, 2004
- Intel Corporation
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS TO MANAGE POWER CONSUMPTION OF A SEMICONDUCTOR...
- Publication number 20080224685
- Publication date Sep 18, 2008
- Amit Dor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Aligning instructions using a variable width instruction alignment...
- Publication number 20060149928
- Publication date Jul 6, 2006
- Intel Corporation, a Delaware corporation
- Thomas Tomazin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus to manage power consumption of a semiconductor...
- Publication number 20060135094
- Publication date Jun 22, 2006
- Amit Dor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable power transition counter
- Publication number 20060107077
- Publication date May 18, 2006
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Maintaining even and odd array pointers to extreme values by search...
- Publication number 20060101230
- Publication date May 11, 2006
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Early exception detection
- Publication number 20050223205
- Publication date Oct 6, 2005
- Juan G. Revilla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Valid bit generation and tracking in a pipelined processor
- Publication number 20040210744
- Publication date Oct 21, 2004
- Intel Corporation, a Delaware corporation
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlling the timing of test modes in a multiple processor system
- Publication number 20040083072
- Publication date Apr 29, 2004
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Single-step processing and selecting debugging modes
- Publication number 20040073780
- Publication date Apr 15, 2004
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Self-nesting interrupts
- Publication number 20040049621
- Publication date Mar 11, 2004
- Ravi P. Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Early exception detection
- Publication number 20020144041
- Publication date Oct 3, 2002
- Juan G. Revilla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-cycle instructions
- Publication number 20020103991
- Publication date Aug 1, 2002
- Intel Corporation and Analog Devices, Inc.
- Gregory A. Overkamp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Security on hardware loops
- Publication number 20020087853
- Publication date Jul 4, 2002
- Ravi P. Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Exception handling in a pipelined processor
- Publication number 20020078334
- Publication date Jun 20, 2002
- Intel Corporation and Analog Devices, Inc.
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data synchronization for a test access port
- Publication number 20020078420
- Publication date Jun 20, 2002
- Charles P. Roth
- G01 - MEASURING TESTING
Information Patent Application
Watchpoint engine for a pipelined processor
- Publication number 20020078329
- Publication date Jun 20, 2002
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Resource efficient hardware loops
- Publication number 20020078333
- Publication date Jun 20, 2002
- Intel Corporation and Analog Devices, Inc.
- Ryo Inoue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Speculative register adjustment
- Publication number 20020078326
- Publication date Jun 20, 2002
- Intel Corporation and Analog Devices, Inc.
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Extended processor reset
- Publication number 20020078336
- Publication date Jun 20, 2002
- Intel Corporation and Analog Devices, Inc.
- Ravi P. Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor stalling
- Publication number 20020069348
- Publication date Jun 6, 2002
- Charles P. Roth
- G06 - COMPUTING CALCULATING COUNTING

Charles Philip Roth

Person

Patents Grantslast 30 patents

Method and apparatus to manage power consumption of a semiconductor...

Programmable power transition counter

Multi-cycle instructions

Method and apparatus to manage power consumption of a semiconductor...

Efficient emulation instruction dispatch based on instruction width

Variable width alignment engine for aligning instructions based on...

Early exception detection

Data synchronization for a test access port

FIFO write/LIFO read trace buffer with software and hardware loop c...

Controlling the timing of test modes in a multiple processor system

Aligning instructions using a variable width alignment engine havin...

Decode and dispatch of multi-issue and multiple width instructions

Hardware loops and pipeline system using advanced generation of loo...

Self-nesting interrupts

Valid bit generation and tracking in a pipelined processor

Processor stalling

Single-step processing and selecting debugging modes

Decoding an instruction portion and forwarding part of the portion...

Maintaining even and odd array pointers to extreme values by search...

Early exception detection

Register adjustment based on adjustment values determined at multip...

Hardware loops

Event handling

Watchpoint engine for a pipelined processor

Exception handling using an exception pipeline in a pipelined proce...

Instruction address generation and tracking in a pipelined processor

Processor reset and instruction fetches

Hardware loops

Security on hardware loops

Event vector table override

Patents Applicationslast 30 patents

METHOD AND APPARATUS TO MANAGE POWER CONSUMPTION OF A SEMICONDUCTOR...

Aligning instructions using a variable width instruction alignment...

Method and apparatus to manage power consumption of a semiconductor...

Programmable power transition counter

Maintaining even and odd array pointers to extreme values by search...

Early exception detection

Valid bit generation and tracking in a pipelined processor

Controlling the timing of test modes in a multiple processor system

Single-step processing and selecting debugging modes

Self-nesting interrupts

Early exception detection

Multi-cycle instructions

Security on hardware loops

Exception handling in a pipelined processor

Data synchronization for a test access port

Watchpoint engine for a pipelined processor

Resource efficient hardware loops

Speculative register adjustment

Extended processor reset

Processor stalling