Chee Hak Teh

Person

Gelugor, MY

People

Patents Grantslast 30 patents

Information Patent Grant
Memory controller for improving data integrity and providing data s...
- Patent number 12,210,633
- Issue date Jan 28, 2025
- SKYECHIP SDN BHD
- Yu Ying Ong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and a system for network-on-chip arbitration
- Patent number 12,199,884
- Issue date Jan 14, 2025
- SKYECHIP SDN BHD
- Yeong Tat Liew
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Micro-network-on-chip and microsector infrastructure
- Patent number 12,164,462
- Issue date Dec 10, 2024
- Altera Corporation
- Ilya K. Ganusov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modular periphery tile for integrated circuit device
- Patent number 12,153,866
- Issue date Nov 26, 2024
- Altera Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for transferring configuration, management, debug...
- Patent number 12,149,407
- Issue date Nov 19, 2024
- SKYECHIP SDN BHD
- Soon Chieh Lim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus of receive enable margining in memory interface
- Patent number 12,125,518
- Issue date Oct 22, 2024
- SKYECHIP SDN BHD
- Soon Chieh Lim
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for clock signal transmission in integrated circuits and...
- Patent number 12,026,008
- Issue date Jul 2, 2024
- Altera Corporation
- Jeffrey Chromczak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fabric die to fabric die interconnect for modularized integrated ci...
- Patent number 12,009,298
- Issue date Jun 11, 2024
- Intel Corporation
- Chee Hak Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Scalable network-on-chip for high-bandwidth memory
- Patent number 11,995,028
- Issue date May 28, 2024
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuits having memory with flexible input-output circuits
- Patent number 11,979,152
- Issue date May 7, 2024
- Intel Corporation
- Chang Kian Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller system and a method of pre-scheduling memory tran...
- Patent number 11,829,643
- Issue date Nov 28, 2023
- SKYECHIP SDN BHD
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable 2.5D interface circuitry
- Patent number 11,741,042
- Issue date Aug 29, 2023
- Altera Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Network-on-chip for inter-die and intra-die communication in modula...
- Patent number 11,726,932
- Issue date Aug 15, 2023
- Intel Corporation
- George Chong Hean Ooi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modular periphery tile for integrated circuit device
- Patent number 11,714,941
- Issue date Aug 1, 2023
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Frequency translation circuitry for an interconnection in an active...
- Patent number 11,669,472
- Issue date Jun 6, 2023
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fabric die to fabric die interconnect for modularized integrated ci...
- Patent number 11,670,589
- Issue date Jun 6, 2023
- Intel Corporation
- Chee Hak Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory controller system and a method for memory scheduling of a st...
- Patent number 11,609,709
- Issue date Mar 21, 2023
- SKYECHIP SDN BHD
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable network-on-chip for high-bandwidth memory
- Patent number 11,580,054
- Issue date Feb 14, 2023
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clocking system and a method of clock synchronization
- Patent number 11,575,383
- Issue date Feb 7, 2023
- SKYECHIP SDN BHD
- Chee Hak Teh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and a method for synchronizing output clock signals acros...
- Patent number 11,509,312
- Issue date Nov 22, 2022
- SKYECHIP SDN BHD
- Chee Hak Teh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for clock signal transmission in integrated circuits and...
- Patent number 11,500,412
- Issue date Nov 15, 2022
- Intel Corporation
- Jeffrey Chromczak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Periphery shoreline augmentation for integrated circuits
- Patent number 11,449,247
- Issue date Sep 20, 2022
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory sequencer system and a method of memory sequencing using the...
- Patent number 11,442,878
- Issue date Sep 13, 2022
- SKYECHIP SDN BHD
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generic physical layer providing a unified architecture for interfa...
- Patent number 11,373,694
- Issue date Jun 28, 2022
- SKYECHIP SDN BHD
- Soon Chieh Lim
- G11 - INFORMATION STORAGE
Information Patent Grant
I/O transmitter circuitry for supporting multi-modes serialization
- Patent number 11,349,481
- Issue date May 31, 2022
- SKYECHIP SDN BHD
- Selvakumar Sivarajah
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Scaling interface architecture between memory and programmable logic
- Patent number 11,301,412
- Issue date Apr 12, 2022
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable 2.5D interface circuitry
- Patent number 11,226,925
- Issue date Jan 18, 2022
- Altera Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation circuitry for an interconnection in an active interpose...
- Patent number 11,216,397
- Issue date Jan 4, 2022
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable 2.5D interface circuitry
- Patent number 11,194,757
- Issue date Dec 7, 2021
- Altera Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic major mode for efficient memory traffic control
- Patent number 11,188,255
- Issue date Nov 30, 2021
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MICRO-NETWORK-ON-CHIP AND MICROSECTOR INFRASTRUCTURE
- Publication number 20250036591
- Publication date Jan 30, 2025
- Intel Corporation
- Ilya K. Ganusov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fabric Die to Fabric Die Interconnect for Modularized Integrated Ci...
- Publication number 20240312909
- Publication date Sep 19, 2024
- Intel Corporation
- Chee Hak Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NETWORK-ON-CHIP PACKETIZATION AND ROUTING METHOD AND APPARATUS FOR...
- Publication number 20240297846
- Publication date Sep 5, 2024
- SKYECHIP SDN BHD
- Chee Hak TEH
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Scalable Network-on-Chip for High-Bandwidth Memory
- Publication number 20240296140
- Publication date Sep 5, 2024
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND A METHOD FOR ALIGNING A PROGRAMMABLE CLOCK OR STROBE
- Publication number 20240192721
- Publication date Jun 13, 2024
- SKYECHIP SDN BHD
- TAT HIN TAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND A SYSTEM FOR NETWORK-ON-CHIP ARBITRATION
- Publication number 20240163223
- Publication date May 16, 2024
- SKYECHIP SDN BHD
- YEONG TAT LIEW
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM AND METHOD FOR TRANSFERRING CONFIGURATION, MANAGEMENT, DEBUG...
- Publication number 20240129183
- Publication date Apr 18, 2024
- SKYECHIP SDN BHD
- Soon Chieh LIM
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD OF DEBUGGING NETWORK-ON-CHIP
- Publication number 20240070039
- Publication date Feb 29, 2024
- SKYECHIP SDN BHD
- Yu Ying ONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE 2.5D INTERFACE CIRCUITRY
- Publication number 20230409515
- Publication date Dec 21, 2023
- Altera Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fabric Die to Fabric Die Interconnect for Modularized Integrated Ci...
- Publication number 20230378061
- Publication date Nov 23, 2023
- Intel Corporation
- Chee Hak Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE
- Publication number 20230306173
- Publication date Sep 28, 2023
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS OF RECEIVE ENABLE MARGINING IN MEMORY INTERFACE
- Publication number 20230230628
- Publication date Jul 20, 2023
- SKYECHIP SDN BHD
- Soon Chieh LIM
- G11 - INFORMATION STORAGE
Information Patent Application
Scalable Network-on-Chip for High-Bandwidth Memory
- Publication number 20230135934
- Publication date May 4, 2023
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER SYSTEM AND A METHOD OF PRE-SCHEDULING MEMORY TRAN...
- Publication number 20230129791
- Publication date Apr 27, 2023
- SKYECHIP SDN BHD
- Chee Hak TEH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques For Clock Signal Transmission In Integrated Circuits And...
- Publication number 20230049681
- Publication date Feb 16, 2023
- Intel Corporation
- Jeffrey Chromczak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORK-ON-CHIP SYSTEM FOR OPTIMIZING DATA TRANSFER
- Publication number 20230040323
- Publication date Feb 9, 2023
- SKYECHIP SDN BHD
- YU YING ONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER FOR IMPROVING DATA INTEGRITY AND PROVIDING DATA S...
- Publication number 20220253536
- Publication date Aug 11, 2022
- SKYECHIP SDN BHD
- YU YING ONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERIC PHYSICAL LAYER PROVIDING A UNIFIED ARCHITECTURE FOR INTERFA...
- Publication number 20220208240
- Publication date Jun 30, 2022
- SKYECHIP SDN BHD
- Soon Chieh LIM
- G11 - INFORMATION STORAGE
Information Patent Application
MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE
- Publication number 20220198115
- Publication date Jun 23, 2022
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MICRO-NETWORK-ON-CHIP AND MICROSECTOR INFRASTRUCTURE
- Publication number 20220197855
- Publication date Jun 23, 2022
- Intel Corporation
- Ilya K. Ganusov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCKING SYSTEM AND A METHOD OF CLOCK SYNCHRONIZATION
- Publication number 20220200610
- Publication date Jun 23, 2022
- SKYECHIP SDN BHD
- CHEE HAK TEH
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MEMORY SEQUENCER SYSTEM AND A METHOD OF MEMORY SEQUENCING USING THE...
- Publication number 20220164298
- Publication date May 26, 2022
- SKYECHIP SDN BHD
- CHEE HAK TEH
- G01 - MEASURING TESTING
Information Patent Application
APPLICATION-BASED DYNAMIC HETEROGENEOUS MANY-CORE SYSTEMS AND METHODS
- Publication number 20220137986
- Publication date May 5, 2022
- Altera Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE 2.5D INTERFACE CIRCUITRY
- Publication number 20220121616
- Publication date Apr 21, 2022
- Altera Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER SYSTEM AND A METHOD FOR MEMORY SCHEDULING OF A ST...
- Publication number 20220100423
- Publication date Mar 31, 2022
- SKYECHIP SDN BHD
- CHEE HAK TEH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSLATION CIRCUITRY FOR AN INTERCONNECTION IN A SEMICONDUCTOR PAC...
- Publication number 20220092009
- Publication date Mar 24, 2022
- Intel Corporation
- Lai Guan Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUITS HAVING MEMORY WITH FLEXIBLE INPUT-OUTPUT CIRCUITS
- Publication number 20220014200
- Publication date Jan 13, 2022
- Intel Corporation
- Chang Kian Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORK-ON-CHIP FOR INTER-DIE AND INTRA-DIE COMMUNICATION IN MODULA...
- Publication number 20210303491
- Publication date Sep 30, 2021
- Intel Corporation
- George Chong Hean Ooi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fabric Die to Fabric Die Interconnect for Modularized Integrated Ci...
- Publication number 20210111116
- Publication date Apr 15, 2021
- Intel Corporation
- Chee Hak Teh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PERIPHERY SHORELINE AUGMENTATION FOR INTEGRATED CIRCUITS
- Publication number 20210072908
- Publication date Mar 11, 2021
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING

Chee Hak Teh

Person

Patents Grantslast 30 patents

Memory controller for improving data integrity and providing data s...

Method and a system for network-on-chip arbitration

Micro-network-on-chip and microsector infrastructure

Modular periphery tile for integrated circuit device

System and method for transferring configuration, management, debug...

Method and apparatus of receive enable margining in memory interface

Techniques for clock signal transmission in integrated circuits and...

Fabric die to fabric die interconnect for modularized integrated ci...

Scalable network-on-chip for high-bandwidth memory

Integrated circuits having memory with flexible input-output circuits

Memory controller system and a method of pre-scheduling memory tran...

Scalable 2.5D interface circuitry

Network-on-chip for inter-die and intra-die communication in modula...

Modular periphery tile for integrated circuit device

Frequency translation circuitry for an interconnection in an active...

Fabric die to fabric die interconnect for modularized integrated ci...

Memory controller system and a method for memory scheduling of a st...

Scalable network-on-chip for high-bandwidth memory

Clocking system and a method of clock synchronization

Apparatus and a method for synchronizing output clock signals acros...

Techniques for clock signal transmission in integrated circuits and...

Periphery shoreline augmentation for integrated circuits

Memory sequencer system and a method of memory sequencing using the...

Generic physical layer providing a unified architecture for interfa...

I/O transmitter circuitry for supporting multi-modes serialization

Scaling interface architecture between memory and programmable logic

Scalable 2.5D interface circuitry

Translation circuitry for an interconnection in an active interpose...

Scalable 2.5D interface circuitry

Dynamic major mode for efficient memory traffic control

Patents Applicationslast 30 patents

MICRO-NETWORK-ON-CHIP AND MICROSECTOR INFRASTRUCTURE

Fabric Die to Fabric Die Interconnect for Modularized Integrated Ci...

NETWORK-ON-CHIP PACKETIZATION AND ROUTING METHOD AND APPARATUS FOR...

Scalable Network-on-Chip for High-Bandwidth Memory

SYSTEM AND A METHOD FOR ALIGNING A PROGRAMMABLE CLOCK OR STROBE

METHOD AND A SYSTEM FOR NETWORK-ON-CHIP ARBITRATION

SYSTEM AND METHOD FOR TRANSFERRING CONFIGURATION, MANAGEMENT, DEBUG...

METHOD OF DEBUGGING NETWORK-ON-CHIP

SCALABLE 2.5D INTERFACE CIRCUITRY

Fabric Die to Fabric Die Interconnect for Modularized Integrated Ci...

MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE

METHOD AND APPARATUS OF RECEIVE ENABLE MARGINING IN MEMORY INTERFACE

Scalable Network-on-Chip for High-Bandwidth Memory

MEMORY CONTROLLER SYSTEM AND A METHOD OF PRE-SCHEDULING MEMORY TRAN...

Techniques For Clock Signal Transmission In Integrated Circuits And...

NETWORK-ON-CHIP SYSTEM FOR OPTIMIZING DATA TRANSFER

MEMORY CONTROLLER FOR IMPROVING DATA INTEGRITY AND PROVIDING DATA S...

GENERIC PHYSICAL LAYER PROVIDING A UNIFIED ARCHITECTURE FOR INTERFA...

MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE

MICRO-NETWORK-ON-CHIP AND MICROSECTOR INFRASTRUCTURE

CLOCKING SYSTEM AND A METHOD OF CLOCK SYNCHRONIZATION

MEMORY SEQUENCER SYSTEM AND A METHOD OF MEMORY SEQUENCING USING THE...

APPLICATION-BASED DYNAMIC HETEROGENEOUS MANY-CORE SYSTEMS AND METHODS

SCALABLE 2.5D INTERFACE CIRCUITRY

MEMORY CONTROLLER SYSTEM AND A METHOD FOR MEMORY SCHEDULING OF A ST...

TRANSLATION CIRCUITRY FOR AN INTERCONNECTION IN A SEMICONDUCTOR PAC...

INTEGRATED CIRCUITS HAVING MEMORY WITH FLEXIBLE INPUT-OUTPUT CIRCUITS

NETWORK-ON-CHIP FOR INTER-DIE AND INTRA-DIE COMMUNICATION IN MODULA...

Fabric Die to Fabric Die Interconnect for Modularized Integrated Ci...

PERIPHERY SHORELINE AUGMENTATION FOR INTEGRATED CIRCUITS