Chen-Chih Hsue

Person

Hsin, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Non-volatile memory device and manufacturing method thereof
- Patent number 11,362,099
- Issue date Jun 14, 2022
- Powerchip Semiconductor Manufacturing Corporation
- Ching-Hua Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory structure and manufacturing method thereof
- Patent number 11,171,217
- Issue date Nov 9, 2021
- Powerchip Semiconductor Manufacturing Corporation
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Photosensitive device
- Patent number 7,411,276
- Issue date Aug 12, 2008
- Powerchip Semiconductor Corp.
- Ming-Jeng Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flash memory cell and manufacturing method thereof
- Patent number 7,183,606
- Issue date Feb 27, 2007
- Powerchip Semiconductor Corp.
- Leo Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a photosensitive structure
- Patent number 7,125,738
- Issue date Oct 24, 2006
- Powerchip Semiconductor Corp.
- Ming-Jeng Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing one-time electrically programmable read on...
- Patent number 7,074,674
- Issue date Jul 11, 2006
- Powerchip Semiconductor Corp.
- Ko-Hsing Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flash memory cell
- Patent number 6,953,963
- Issue date Oct 11, 2005
- Powerchip Semiconductor Corp.
- Leo Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual damascene process using metal hard mask
- Patent number 6,696,222
- Issue date Feb 24, 2004
- Silicon Integrated Systems Corp.
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for improving adhesion of a low k dielectric to a barrier layer
- Patent number 6,649,512
- Issue date Nov 18, 2003
- Silicon Integrated Systems Corp.
- Shyh-Dar Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capacitor with lower electrode located at the same level as an inte...
- Patent number 6,603,167
- Issue date Aug 5, 2003
- Silicon Integrated Systems Corp.
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming selective protection layers on copper interconnects
- Patent number 6,521,523
- Issue date Feb 18, 2003
- Silicon Integrated Systems Corp.
- Shyh-Dar Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating polysilicon capacitor
- Patent number 6,514,815
- Issue date Feb 4, 2003
- Silicon Integrated Systems Corp.
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal capacitor in damascene structures
- Patent number 6,512,260
- Issue date Jan 28, 2003
- Silicon Integrated Systems Corp.
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a MOS device with improved well control st...
- Patent number 6,509,238
- Issue date Jan 21, 2003
- Silicon Integrated SAystems Corp.
- Teng-Feng Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal capacitors with damascene structures
- Patent number 6,504,205
- Issue date Jan 7, 2003
- Silicon Integrated Systems Corp.
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal capacitors with damascene structures and method for forming t...
- Patent number 6,495,877
- Issue date Dec 17, 2002
- Silicon Integrated Systems Corp.
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a metal capacitor in a damascene process
- Patent number 6,492,226
- Issue date Dec 10, 2002
- Silicon Integrated Systems Corp.
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual damascene process using an oxide liner for a dielectric barrie...
- Patent number 6,486,059
- Issue date Nov 26, 2002
- Silicon Intergrated Systems Corp.
- Shyh-Dar Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual damascene structure having capacitors
- Patent number 6,483,142
- Issue date Nov 19, 2002
- Silicon Integrated Systems Corp.
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a metal capacitor in a damascene process
- Patent number 6,410,386
- Issue date Jun 25, 2002
- Silicon Integrated Systems Corp.
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a dual damascene structure having capacitors
- Patent number 6,391,713
- Issue date May 21, 2002
- Silicon Integrated Systems Corp.
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating metal capacitor
- Patent number 6,358,792
- Issue date Mar 19, 2002
- Silicon Integrated Systems Corp.
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming metal capacitors with a damascene process
- Patent number 6,338,999
- Issue date Jan 15, 2002
- Silicon Integrated Systems Corp.
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a capacitor
- Patent number 5,946,571
- Issue date Aug 31, 1999
- United Microelectronics Corp.
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trench surrounded metal pattern
- Patent number 5,924,006
- Issue date Jul 13, 1999
- United Microelectronics Corp.
- Water Lur
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Trench surrounded metal pattern
- Patent number 5,915,201
- Issue date Jun 22, 1999
- United Microelectronics Corporation
- Peter Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating flash memory cell having a decreased overlap...
- Patent number 5,882,970
- Issue date Mar 16, 1999
- United Microelectronics Corporation
- Chih-Hung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a blanket N-well structure for SRAM data stability...
- Patent number 5,858,826
- Issue date Jan 12, 1999
- United Microelectronics Corporation
- Chung-Yuan Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Planar field oxide isolation process for semiconductor integrated c...
- Patent number 5,849,625
- Issue date Dec 15, 1998
- United Microelectronics Coporation
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for reflowing and annealing borophosphosilicat...
- Patent number 5,828,036
- Issue date Oct 27, 1998
- United Microelectronics Corporation
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
MEMORY STRUCTURE AND MANUFACTURING METHOD THEREOF
- Publication number 20210351274
- Publication date Nov 11, 2021
- Powerchip Semiconductor Manufacturing Corporation
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-VOLATILE MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20210265368
- Publication date Aug 26, 2021
- Powerchip Semiconductor Manufacturing Corporation
- Ching-Hua Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Photosensitive structure and method of fabricating the same
- Publication number 20070004075
- Publication date Jan 4, 2007
- Ming-Jeng Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING ONE-TIME ELECTRICALLY PROGRAMMABLE READ ON...
- Publication number 20060154418
- Publication date Jul 13, 2006
- Ko-Hsing Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Photosensitive structure and method of fabricating the same
- Publication number 20060084194
- Publication date Apr 20, 2006
- Powerchip Seminconductor Corp.
- Ming-Jeng Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLASH MEMORY CELL AND MANUFACTURING METHOD THEREOF
- Publication number 20050255658
- Publication date Nov 17, 2005
- Leo Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
[FLASH MEMORY CELL AND MANUFACTURING METHOD THEREOF]
- Publication number 20050051833
- Publication date Mar 10, 2005
- Leo Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR IMPROVING ADHESION OF A LOW K DIELECTRIC TO A BARRIER LAYER
- Publication number 20030228750
- Publication date Dec 11, 2003
- Shyh-Dar Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming identifying mark on semiconductor wafer
- Publication number 20030141605
- Publication date Jul 31, 2003
- SILICON INTEGRATED SYSTEMS CORP.
- Shyh-Dar Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Interconnect structure capped with a metallic barrier layer and met...
- Publication number 20030116826
- Publication date Jun 26, 2003
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of fabricating an IMD layer to improve global planarization...
- Publication number 20030119301
- Publication date Jun 26, 2003
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Interconnect structure with a cap layer on an IMD layer and a metho...
- Publication number 20030075807
- Publication date Apr 24, 2003
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process for preparing porous low dielectric constant material
- Publication number 20030044532
- Publication date Mar 6, 2003
- Shyh-Dar Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dual damascene process using metal hard mask
- Publication number 20030044725
- Publication date Mar 6, 2003
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A METALLIC INTERCONNECT STRUCTURE WITH A METALLIC...
- Publication number 20030038371
- Publication date Feb 27, 2003
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Selective barrier metal fabricated for interconnect structure manuf...
- Publication number 20030008495
- Publication date Jan 9, 2003
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL CAPACITOR IN DAMASCENE STRUCTURES
- Publication number 20020190299
- Publication date Dec 19, 2002
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING A METAL CAPACITOR IN A DAMASCENE PROCESS
- Publication number 20020192921
- Publication date Dec 19, 2002
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Capacitor with lower electrode located at the same level as an inte...
- Publication number 20020190301
- Publication date Dec 19, 2002
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING SELECTIVE PROTECTION LAYERS ON COPPER INTERCONNECTS
- Publication number 20020192940
- Publication date Dec 19, 2002
- Shyh-Dar Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL CAPACITORS WITH DAMASCENE STRUCTURES
- Publication number 20020190386
- Publication date Dec 19, 2002
- Silicon Integrated Systems Corporation
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL CAPACITORS WITH DAMASCENE STRUCTURES AND METHOD FOR FORMING T...
- Publication number 20020190300
- Publication date Dec 19, 2002
- Silicon Integrated Systems Corporation
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING POLYSILICON CAPACITOR
- Publication number 20020192922
- Publication date Dec 19, 2002
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Interconnect structure manufacturing process
- Publication number 20020182850
- Publication date Dec 5, 2002
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Interconnects with dielectric spacers and method for forming the same
- Publication number 20020177299
- Publication date Nov 28, 2002
- Yei-Hsiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Interconnects with dual dielectric spacers and method for forming t...
- Publication number 20020177080
- Publication date Nov 28, 2002
- Cheng-Hui Chung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DUAL DAMASCENE STRUCTURE HAVING CAPACITORS
- Publication number 20020167090
- Publication date Nov 14, 2002
- Silicon Integrated Systems Corp.
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Dual damascene process using an oxide liner for a dielectric barrie...
- Publication number 20020155695
- Publication date Oct 24, 2002
- Silicon Integrated Systems Corp.
- Shyh-Dar Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electrostatic discharge effect free mask
- Publication number 20020115001
- Publication date Aug 22, 2002
- Chen-Chiu Hsue
- B32 - LAYERED PRODUCTS

Chen-Chih Hsue

Person

Patents Grantslast 30 patents

Non-volatile memory device and manufacturing method thereof

Memory structure and manufacturing method thereof

Photosensitive device

Flash memory cell and manufacturing method thereof

Method of fabricating a photosensitive structure

Method for manufacturing one-time electrically programmable read on...

Flash memory cell

Dual damascene process using metal hard mask

Method for improving adhesion of a low k dielectric to a barrier layer

Capacitor with lower electrode located at the same level as an inte...

Method for forming selective protection layers on copper interconnects

Method for fabricating polysilicon capacitor

Metal capacitor in damascene structures

Method for manufacturing a MOS device with improved well control st...

Metal capacitors with damascene structures

Metal capacitors with damascene structures and method for forming t...

Method for forming a metal capacitor in a damascene process

Dual damascene process using an oxide liner for a dielectric barrie...

Dual damascene structure having capacitors

Method for forming a metal capacitor in a damascene process

Method for forming a dual damascene structure having capacitors

Method for fabricating metal capacitor

Method for forming metal capacitors with a damascene process

Method of forming a capacitor

Trench surrounded metal pattern

Trench surrounded metal pattern

Method for fabricating flash memory cell having a decreased overlap...

Method of making a blanket N-well structure for SRAM data stability...

Planar field oxide isolation process for semiconductor integrated c...

Method and apparatus for reflowing and annealing borophosphosilicat...

Patents Applicationslast 30 patents

MEMORY STRUCTURE AND MANUFACTURING METHOD THEREOF

NON-VOLATILE MEMORY DEVICE AND MANUFACTURING METHOD THEREOF

Photosensitive structure and method of fabricating the same

METHOD FOR MANUFACTURING ONE-TIME ELECTRICALLY PROGRAMMABLE READ ON...

Photosensitive structure and method of fabricating the same

FLASH MEMORY CELL AND MANUFACTURING METHOD THEREOF

[FLASH MEMORY CELL AND MANUFACTURING METHOD THEREOF]

METHOD FOR IMPROVING ADHESION OF A LOW K DIELECTRIC TO A BARRIER LAYER

Method of forming identifying mark on semiconductor wafer

Interconnect structure capped with a metallic barrier layer and met...

Method of fabricating an IMD layer to improve global planarization...

Interconnect structure with a cap layer on an IMD layer and a metho...

Process for preparing porous low dielectric constant material

Dual damascene process using metal hard mask

METHOD OF FORMING A METALLIC INTERCONNECT STRUCTURE WITH A METALLIC...

Selective barrier metal fabricated for interconnect structure manuf...

METAL CAPACITOR IN DAMASCENE STRUCTURES

METHOD FOR FORMING A METAL CAPACITOR IN A DAMASCENE PROCESS

Capacitor with lower electrode located at the same level as an inte...

METHOD FOR FORMING SELECTIVE PROTECTION LAYERS ON COPPER INTERCONNECTS

METAL CAPACITORS WITH DAMASCENE STRUCTURES

METAL CAPACITORS WITH DAMASCENE STRUCTURES AND METHOD FOR FORMING T...

METHOD FOR FABRICATING POLYSILICON CAPACITOR

Interconnect structure manufacturing process

Interconnects with dielectric spacers and method for forming the same

Interconnects with dual dielectric spacers and method for forming t...

DUAL DAMASCENE STRUCTURE HAVING CAPACITORS

Dual damascene process using an oxide liner for a dielectric barrie...

Electrostatic discharge effect free mask