Chenchu Punnarao Bandi

Person

Bayan Lepas, MY

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus for universal serial bus 2.0 (USB2) combined high speed s...
- Patent number 11,029,750
- Issue date Jun 8, 2021
- Intel Corporation
- Amit Kumar Srivastava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive calibration technique for cross talk cancellation
- Patent number 11,016,920
- Issue date May 25, 2021
- Intel Corporation
- Chenchu Punnarao Bandi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for adaptive link training mechanism to calibrate...
- Patent number 10,887,075
- Issue date Jan 5, 2021
- Intel Corporation
- Amit Kumar Srivastava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Die interconnect signal management devices and methods
- Patent number 10,528,103
- Issue date Jan 7, 2020
- Intel Corporation
- Chenchu Punnarao Bandi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed sense amplifier latch with low power rail-to-rail input...
- Patent number 10,333,689
- Issue date Jun 25, 2019
- Intel Corporation
- Pankaj Vinayak Dudulwar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus and method for strobe centering for source synchronous links
- Patent number 10,110,210
- Issue date Oct 23, 2018
- Intel Corporation
- Chenchu Punnarao Bandi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method, apparatus and system for deskewing parallel interface links
- Patent number 9,832,006
- Issue date Nov 28, 2017
- Intel Corporation
- Chenchu Punnarao Bandi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Link training to recover asynchronous clock timing margin loss in p...
- Patent number 9,742,603
- Issue date Aug 22, 2017
- Intel Corporation
- Chenchu Punnarao Bandi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High speed sense amplifier latch with low power rail-to-rail input...
- Patent number 9,443,567
- Issue date Sep 13, 2016
- Intel Corporation
- Pankaj Vinayak Dudulwar
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
APPARATUS FOR UNIVERSAL SERIAL BUS 2.0 (USB2) COMBINED HIGH SPEED S...
- Publication number 20190004590
- Publication date Jan 3, 2019
- Intel Corporation
- Amit Kumar Srivastava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIE INTERCONNECT SIGNAL MANAGEMENT DEVICES AND METHODS
- Publication number 20180364774
- Publication date Dec 20, 2018
- Chenchu Punnarao Bandi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR ADAPTIVE LINK TRAINING MECHANISM TO CALIBRATE...
- Publication number 20180287771
- Publication date Oct 4, 2018
- Intel Corporation
- Amit Kumar Srivastava
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ADAPTIVE CALIBRATION TECHNIQUE FOR CROSS TALK CANCELLATION
- Publication number 20180189213
- Publication date Jul 5, 2018
- Intel Corporation
- Chenchu Punnarao Bandi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR STROBE CENTERING FOR SOURCE SYNCHRONOUS LINKS
- Publication number 20180175839
- Publication date Jun 21, 2018
- Intel Corporation
- Chenchu Punnarao Bandi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method, Apparatus And System For Deskewing Parallel Interface Links
- Publication number 20170346617
- Publication date Nov 30, 2017
- Intel Corporation
- Chenchu Punnarao Bandi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH SPEED SENSE AMPLIFIER LATCH WITH LOW POWER RAIL-TO-RAIL INPUT...
- Publication number 20160380753
- Publication date Dec 29, 2016
- Intel Corporation
- Pankaj Vinayak Dudulwar
- G11 - INFORMATION STORAGE

Chenchu Punnarao Bandi

Person

Patents Grantslast 30 patents

Apparatus for universal serial bus 2.0 (USB2) combined high speed s...

Adaptive calibration technique for cross talk cancellation

Method and system for adaptive link training mechanism to calibrate...

Die interconnect signal management devices and methods

High speed sense amplifier latch with low power rail-to-rail input...

Apparatus and method for strobe centering for source synchronous links

Method, apparatus and system for deskewing parallel interface links

Link training to recover asynchronous clock timing margin loss in p...

High speed sense amplifier latch with low power rail-to-rail input...

Patents Applicationslast 30 patents

APPARATUS FOR UNIVERSAL SERIAL BUS 2.0 (USB2) COMBINED HIGH SPEED S...

DIE INTERCONNECT SIGNAL MANAGEMENT DEVICES AND METHODS

METHOD AND SYSTEM FOR ADAPTIVE LINK TRAINING MECHANISM TO CALIBRATE...

ADAPTIVE CALIBRATION TECHNIQUE FOR CROSS TALK CANCELLATION

APPARATUS AND METHOD FOR STROBE CENTERING FOR SOURCE SYNCHRONOUS LINKS

Method, Apparatus And System For Deskewing Parallel Interface Links

HIGH SPEED SENSE AMPLIFIER LATCH WITH LOW POWER RAIL-TO-RAIL INPUT...