Cheng-Liang Ding

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Cupertino, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Dual-structure clock tree synthesis (CTS)
- Patent number 9,053,281
- Issue date Jun 9, 2015
- Synopsys, Inc.
- Xiaojun Ma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic clock tree synthesis exceptions generation
- Patent number 8,843,872
- Issue date Sep 23, 2014
- Synopsys, Inc.
- Ssu-Min Chang
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DUAL-STRUCTURE CLOCK TREE SYNTHESIS (CTS)
- Publication number 20140289694
- Publication date Sep 25, 2014
- Synopsys, Inc.
- Xiaojun Ma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATIC CLOCK TREE SYNTHESIS EXCEPTIONS GENERATION
- Publication number 20140282350
- Publication date Sep 18, 2014
- Synopsys, Inc.
- Ssu-Min Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for improving timing behavior in a hardware logic emulation...
- Publication number 20020178427
- Publication date Nov 28, 2002
- Cheng-Liang Ding
- G06 - COMPUTING CALCULATING COUNTING