Chi-Yu Chou

Person

Zhubei City, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Formation and in-situ etching processes for metal layers
- Patent number 12,170,202
- Issue date Dec 17, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd
- Po-Yu Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation and in-situ etching processes for metal layers
- Patent number 11,545,363
- Issue date Jan 3, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd
- Po-Yu Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation and in-situ etching processes for metal layers
- Patent number 10,872,769
- Issue date Dec 22, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd
- Po-Yu Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation and in-situ etching processes for metal layers
- Patent number 10,535,523
- Issue date Jan 14, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd
- Po-Yu Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Array substrate
- Patent number 9,263,481
- Issue date Feb 16, 2016
- AU Optronics Corp.
- Yi-Chen Chung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacturing method of array substrate
- Patent number 9,147,700
- Issue date Sep 29, 2015
- AU Optronics Corp.
- Yi-Chen Chung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Barrier layer for copper interconnect
- Patent number 9,064,934
- Issue date Jun 23, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Hung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Array substrate and manufacturing method thereof
- Patent number 8,969,146
- Issue date Mar 3, 2015
- AU Optronics Corp.
- Yi-Chen Chung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Barrier layer for copper interconnect
- Patent number 8,872,342
- Issue date Oct 28, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Hung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming seed layer structure
- Patent number 8,778,801
- Issue date Jul 15, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Bin Chiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacturing method of array substrate
- Patent number 8,759,165
- Issue date Jun 24, 2014
- AU Optronics Corp.
- Hui-Ling Ku
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Barrier layer for copper interconnect
- Patent number 8,722,531
- Issue date May 13, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Hung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Array substrate and manufacturing method thereof
- Patent number 8,674,365
- Issue date Mar 18, 2014
- AU Optronics Corp.
- Hui-Ling Ku
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal-insulator-metal (MIM) capacitor structure in copper-CMOS circ...
- Patent number 6,881,996
- Issue date Apr 19, 2005
- Taiwan Semiconductor Manufacturing Company
- Chun-Hon Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a new metal-insulator-metal (MIM) capacitor struc...
- Patent number 6,812,088
- Issue date Nov 2, 2004
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chun-Hon Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dual damascene interconnect structures that include radio frequency...
- Patent number 6,472,721
- Issue date Oct 29, 2002
- Taiwan Semiconductor Manufacturing Company
- Ssu-Pin Ma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Copper process compatible CMOS metal-insulator-metal capacitor stru...
- Patent number 6,329,234
- Issue date Dec 11, 2001
- Taiwan Semiconductor Manufactuirng Company
- Ssu-Pin Ma
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
FORMATION AND IN-SITU ETCHING PROCESSES FOR METAL LAYERS
- Publication number 20240363350
- Publication date Oct 31, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Po-Yu LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-GATE DEVICE FABRICATION METHODS AND RELATED STRUCTURES
- Publication number 20240120239
- Publication date Apr 11, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Wei CHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICES AND METHODS OF FABRICATION THEREOF
- Publication number 20240105787
- Publication date Mar 28, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Wei CHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Isolation Structures in Semiconductor Devices
- Publication number 20240055476
- Publication date Feb 15, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Wei CHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME
- Publication number 20240030318
- Publication date Jan 25, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Wei CHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHODS OF FORMATION
- Publication number 20230411453
- Publication date Dec 21, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Wei Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Epitaxial Structures In Semiconductor Devices
- Publication number 20230402508
- Publication date Dec 14, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Cheng-Wei CHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHODS OF FORMATION
- Publication number 20230369395
- Publication date Nov 16, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Wei CHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE HAVING IMPROVED GATE STACKS AND METHODS OF FAB...
- Publication number 20230352546
- Publication date Nov 2, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Wei Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHODS OF FORMATION
- Publication number 20230352564
- Publication date Nov 2, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Cheng-Wei CHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMATION AND IN-SITU ETCHING PROCESSES FOR METAL LAYERS
- Publication number 20230141521
- Publication date May 11, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Po-Yu LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMATION AND IN-SITU ETCHING PROCESSES FOR METAL LAYERS
- Publication number 20210111027
- Publication date Apr 15, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Po-Yu LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMATION AND IN-SITU ETCHING PROCESSES FOR METAL LAYERS
- Publication number 20200135471
- Publication date Apr 30, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Po-Yu LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ARRAY SUBSTRATE
- Publication number 20150123128
- Publication date May 7, 2015
- AU OPTRONICS CORP.
- Yi-Chen Chung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MANUFACTURING METHOD OF ARRAY SUBSTRATE
- Publication number 20150126006
- Publication date May 7, 2015
- AU OPTRONICS CORP.
- Yi-Chen Chung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Barrier Layer for Copper Interconnect
- Publication number 20150044867
- Publication date Feb 12, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Hung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Barrier Layer for Copper Interconnect
- Publication number 20140191402
- Publication date Jul 10, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Hung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MANUFACTURING METHOD OF ARRAY SUBSTRATE
- Publication number 20140127844
- Publication date May 8, 2014
- AU OPTRONICS CORP.
- Hui-Ling Ku
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BARRIER LAYER FOR COPPER INTERCONNECT
- Publication number 20140117547
- Publication date May 1, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Hung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Seed Layer Structure and Method
- Publication number 20140084470
- Publication date Mar 27, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chen-Bin Chiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF
- Publication number 20130161625
- Publication date Jun 27, 2013
- AU OPTRONICS CORP.
- Hui-Ling Ku
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF
- Publication number 20130134425
- Publication date May 30, 2013
- AU OPTRONICS CORP.
- Yi-Chen Chung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for making a new metal-insulator-metal (MIM) capacitor struc...
- Publication number 20050029566
- Publication date Feb 10, 2005
- Chun-Hon Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming self-aligned silicide layers on semiconductor dev...
- Publication number 20020182860
- Publication date Dec 5, 2002
- Cheng-Kuo Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Copper MIM structure and process for mixed-signal and Rf capacitors...
- Publication number 20020019123
- Publication date Feb 14, 2002
- TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY
- Ssu-Pin Ma
- H01 - BASIC ELECTRIC ELEMENTS

Chi-Yu Chou

Person

Patents Grantslast 30 patents

Formation and in-situ etching processes for metal layers

Formation and in-situ etching processes for metal layers

Formation and in-situ etching processes for metal layers

Formation and in-situ etching processes for metal layers

Array substrate

Manufacturing method of array substrate

Barrier layer for copper interconnect

Array substrate and manufacturing method thereof

Barrier layer for copper interconnect

Method for forming seed layer structure

Manufacturing method of array substrate

Barrier layer for copper interconnect

Array substrate and manufacturing method thereof

Metal-insulator-metal (MIM) capacitor structure in copper-CMOS circ...

Method for making a new metal-insulator-metal (MIM) capacitor struc...

Dual damascene interconnect structures that include radio frequency...

Copper process compatible CMOS metal-insulator-metal capacitor stru...

Patents Applicationslast 30 patents

FORMATION AND IN-SITU ETCHING PROCESSES FOR METAL LAYERS

MULTI-GATE DEVICE FABRICATION METHODS AND RELATED STRUCTURES

SEMICONDUCTOR DEVICES AND METHODS OF FABRICATION THEREOF

Isolation Structures in Semiconductor Devices

SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME

SEMICONDUCTOR DEVICE AND METHODS OF FORMATION

Epitaxial Structures In Semiconductor Devices

SEMICONDUCTOR DEVICE AND METHODS OF FORMATION

SEMICONDUCTOR DEVICE HAVING IMPROVED GATE STACKS AND METHODS OF FAB...

SEMICONDUCTOR DEVICE AND METHODS OF FORMATION

FORMATION AND IN-SITU ETCHING PROCESSES FOR METAL LAYERS

FORMATION AND IN-SITU ETCHING PROCESSES FOR METAL LAYERS

FORMATION AND IN-SITU ETCHING PROCESSES FOR METAL LAYERS

ARRAY SUBSTRATE

MANUFACTURING METHOD OF ARRAY SUBSTRATE

Barrier Layer for Copper Interconnect

Barrier Layer for Copper Interconnect

MANUFACTURING METHOD OF ARRAY SUBSTRATE

BARRIER LAYER FOR COPPER INTERCONNECT

Seed Layer Structure and Method

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF

Method for making a new metal-insulator-metal (MIM) capacitor struc...

Method of forming self-aligned silicide layers on semiconductor dev...

Copper MIM structure and process for mixed-signal and Rf capacitors...