Chia-Jung Tu

Person

Hsinchu County, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Interconnect structures, packaged semiconductor devices, and method...
- Patent number 12,159,862
- Issue date Dec 3, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Wei Tu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Communication system between dies and operation method thereof
- Patent number 11,902,171
- Issue date Feb 13, 2024
- Global Unichip Corporation
- Chang-Ming Liu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Plurality of different size metal layers for a pad structure
- Patent number 11,784,124
- Issue date Oct 10, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hsien-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transmitter
- Patent number 11,703,900
- Issue date Jul 18, 2023
- Cvitek Co. Ltd.
- Chun-Wen Yeh
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Semiconductor structure
- Patent number 11,664,383
- Issue date May 30, 2023
- Taiwan Semiconductor Manufacturing Company Ltd.
- Hsueh-Chih Chou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Automated systems and methods for natural language processing with...
- Patent number 11,632,463
- Issue date Apr 18, 2023
- Chubb Life Insurance Taiwan Company
- Joshua Chihsong Ding
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Plurality of different size metal layers for a pad structure
- Patent number 11,417,599
- Issue date Aug 16, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hsien-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method of timing characterization for semiconductor circuit
- Patent number 11,270,052
- Issue date Mar 8, 2022
- Taiwan Semiconductor Manufacturing Company Ltd.
- Chia Hao Tu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reliability testing method and apparatus
- Patent number 11,226,363
- Issue date Jan 18, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Shiang-Ruei Su
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Testing apparatus
- Patent number 11,209,462
- Issue date Dec 28, 2021
- Star Technologies, Inc.
- Choon Leong Lou
- G01 - MEASURING TESTING
Information Patent Grant
Automated systems and methods for natural language processing with...
- Patent number 11,159,679
- Issue date Oct 26, 2021
- Cigna Taiwan Life Assurance Co. Ltd.
- Joshua Chihsong Ding
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor structure
- Patent number 11,037,957
- Issue date Jun 15, 2021
- Taiwan Semiconductor Manufacturing Company Ltd.
- Hsueh-Chih Chou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect structures, packaged semiconductor devices, and method...
- Patent number 10,867,975
- Issue date Dec 15, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Wei Tu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System and method of timing characterization for semiconductor circuit
- Patent number 10,824,784
- Issue date Nov 3, 2020
- Taiwan Semiconductor Manufacturing Company Ltd.
- Chia Hao Tu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit packages and methods for forming the same
- Patent number 10,770,366
- Issue date Sep 8, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Wei Tu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure
- Patent number 10,685,982
- Issue date Jun 16, 2020
- Taiwan Semiconductor Manufacturing Company Ltd.
- Hsueh-Chih Chou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plurality of different size metal layers for a pad structure
- Patent number 10,658,290
- Issue date May 19, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hsien-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Foldable display device
- Patent number 10,631,608
- Issue date Apr 28, 2020
- AU Optronics Corp.
- Po-Yang Lin
- A45 - HAND OR TRAVELLING ARTICLES
Information Patent Grant
Integrated circuit packages and methods for forming the same
- Patent number 10,510,635
- Issue date Dec 17, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Wei Tu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reliability testing method
- Patent number 10,495,687
- Issue date Dec 3, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd
- Shiang-Ruei Su
- G01 - MEASURING TESTING
Information Patent Grant
Packaging structures of integrated circuits
- Patent number 10,453,818
- Issue date Oct 22, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Fu Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect structures, packaged semiconductor devices, and method...
- Patent number 10,340,258
- Issue date Jul 2, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Wei Tu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plurality of different size metal layers for a pad structure
- Patent number 10,276,496
- Issue date Apr 30, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hsien-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and apparatus of packaging semiconductor devices
- Patent number 10,269,750
- Issue date Apr 23, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Wei Tu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packages and methods for forming the same
- Patent number 10,056,312
- Issue date Aug 21, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Wei Tu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flexible substrate
- Patent number 9,961,759
- Issue date May 1, 2018
- Chipbond Technology Corporation
- Chin-Tang Hsieh
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Wafer dicing method
- Patent number 9,929,051
- Issue date Mar 27, 2018
- Chipbond Technology Corporation
- Chia-Jung Tu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Foldable display device
- Patent number 9,844,251
- Issue date Dec 19, 2017
- AU Optronics Corp.
- Po-Yang Lin
- A45 - HAND OR TRAVELLING ARTICLES
Information Patent Grant
Integrated circuit packages and methods for forming the same
- Patent number 9,780,009
- Issue date Oct 3, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Wei Tu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for packaging pad structure
- Patent number 9,773,732
- Issue date Sep 26, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsien-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTERCONNECT STRUCTURES, PACKAGED SEMICONDUCTOR DEVICES, AND METHOD...
- Publication number 20240395782
- Publication date Nov 28, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chia-Wei Tu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ANTI-DIZZINESS DISPLAY METHOD, PROCESSING DEVICE, AND INFORMATION D...
- Publication number 20240379075
- Publication date Nov 14, 2024
- Industrial Technology Research Institute
- Hong-Ming Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR COMPENSATING ANTI-DIZZINESS PREDICTED IN ADVANCE
- Publication number 20240312431
- Publication date Sep 19, 2024
- Industrial Technology Research Institute
- Hong-Ming DAI
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Application
METHOD, PROCESSING DEVICE, AND SYSTEM FOR INFORMATION DISPLAY
- Publication number 20240236257
- Publication date Jul 11, 2024
- Industrial Technology Research Institute
- Yu-Hsuan Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISPLAY METHOD AND DISPLAY SYSTEM FOR ANTI-DIZZINESS REFERENCE IMAGE
- Publication number 20230386371
- Publication date Nov 30, 2023
- Industrial Technology Research Institute
- Ya-Rou HSU
- B60 - VEHICLES IN GENERAL
Information Patent Application
METHOD FOR SIMULATING SYSTEM AND ASSOCIATED ELECTRONIC DEVICE
- Publication number 20230244843
- Publication date Aug 3, 2023
- Realtek Semiconductor Corp.
- Shih-Hung Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, PROCESSING DEVICE, AND DISPLAY SYSTEM FOR INFORMATION DISPLAY
- Publication number 20230162459
- Publication date May 25, 2023
- Industrial Technology Research Institute
- Yu-Hsuan Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMUNICATION SYSTEM BETWEEN DIES AND OPERATION METHOD THEREOF
- Publication number 20230032605
- Publication date Feb 2, 2023
- GLOBAL UNICHIP CORPORATION
- Chang-Ming Liu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Plurality of Different Size Metal Layers for a Pad Structure
- Publication number 20220359371
- Publication date Nov 10, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsien-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSMITTER
- Publication number 20220190716
- Publication date Jun 16, 2022
- Cvitek Co. Ltd.
- Chun-Wen YEH
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
AUTOMATED SYSTEMS AND METHODS FOR NATURAL LANGUAGE PROCESSING WITH...
- Publication number 20220053093
- Publication date Feb 17, 2022
- Cigna Taiwan Life Assurance Co. Ltd.
- Joshua Chihsong Ding
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR STRUCTURE
- Publication number 20210280608
- Publication date Sep 9, 2021
- Taiwan Semiconductor Manufacturing company Ltd.
- HSUEH-CHIH CHOU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Interconnect Structures, Packaged Semiconductor Devices, and Method...
- Publication number 20210098435
- Publication date Apr 1, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd. Hsinchu
- Chia-Wei Tu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND DEVICE FOR COMPRESSION BONDING CHIP TO SUBSTRATE
- Publication number 20210035947
- Publication date Feb 4, 2021
- Chipbond Technology Corporation
- Chin-Tang Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEM AND METHOD OF TIMING CHARACTERIZATION FOR SEMICONDUCTOR CIRCUIT
- Publication number 20200410152
- Publication date Dec 31, 2020
- Taiwan Semiconductor Manufacturing company Ltd.
- CHIA HAO TU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR STRUCTURE
- Publication number 20200286919
- Publication date Sep 10, 2020
- Taiwan Semiconductor Manufacturing company Ltd.
- HSUEH-CHIH CHOU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Plurality of Different Size Metal Layers for a Pad Structure
- Publication number 20200279802
- Publication date Sep 3, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsien-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
AUTOMATED SYSTEMS AND METHODS FOR NATURAL LANGUAGE PROCESSING WITH...
- Publication number 20200274970
- Publication date Aug 27, 2020
- Cigna Taiwan Life Assurance Co. Ltd.
- Joshua Chihsong Ding
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD OF TIMING CHARACTERIZATION FOR SEMICONDUCTOR CIRCUIT
- Publication number 20200110912
- Publication date Apr 9, 2020
- Taiwan Semiconductor Manufacturing company Ltd.
- CHIA HAO TU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND DEVICE FOR COMPRESSION BONDING CHIP TO SUBSTRATE
- Publication number 20200105712
- Publication date Apr 2, 2020
- Chipbond Technology Corporation
- Chin-Tang Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RELIABILITY TESTING METHOD AND APPARATUS
- Publication number 20200088786
- Publication date Mar 19, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shiang-Ruei SU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit Packages and Methods for Forming the Same
- Publication number 20200091027
- Publication date Mar 19, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Wei Tu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Interconnect Structures, Packaged Semiconductor Devices, and Method...
- Publication number 20190273071
- Publication date Sep 5, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Wei Tu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Plurality of Different Size Metal Layers for a Pad Structure
- Publication number 20190259700
- Publication date Aug 22, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsien-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE
- Publication number 20190164992
- Publication date May 30, 2019
- Taiwan Semiconductor Manufacturing company Ltd.
- HSUEH-CHIH CHOU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit Packages and Methods for Forming the Same
- Publication number 20180308778
- Publication date Oct 25, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Wei Tu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Packaging Structures of Integrated Circuits
- Publication number 20180151528
- Publication date May 31, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tsung-Fu Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER DICING METHOD
- Publication number 20180090379
- Publication date Mar 29, 2018
- Chipbond Technology Corporation
- Chia-Jung Tu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit Packages and Methods for Forming the Same
- Publication number 20180025959
- Publication date Jan 25, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Wei Tu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and Apparatus for Packaging Pad Structure
- Publication number 20180012837
- Publication date Jan 11, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hsien-Wei Chen
- H01 - BASIC ELECTRIC ELEMENTS

Chia-Jung Tu

Person

Patents Grantslast 30 patents

Interconnect structures, packaged semiconductor devices, and method...

Communication system between dies and operation method thereof

Plurality of different size metal layers for a pad structure

Transmitter

Semiconductor structure

Automated systems and methods for natural language processing with...

Plurality of different size metal layers for a pad structure

System and method of timing characterization for semiconductor circuit

Reliability testing method and apparatus

Testing apparatus

Automated systems and methods for natural language processing with...

Semiconductor structure

Interconnect structures, packaged semiconductor devices, and method...

System and method of timing characterization for semiconductor circuit

Integrated circuit packages and methods for forming the same

Semiconductor structure

Plurality of different size metal layers for a pad structure

Foldable display device

Integrated circuit packages and methods for forming the same

Reliability testing method

Packaging structures of integrated circuits

Interconnect structures, packaged semiconductor devices, and method...

Plurality of different size metal layers for a pad structure

Methods and apparatus of packaging semiconductor devices

Integrated circuit packages and methods for forming the same

Flexible substrate

Wafer dicing method

Foldable display device

Integrated circuit packages and methods for forming the same

Method and apparatus for packaging pad structure

Patents Applicationslast 30 patents

INTERCONNECT STRUCTURES, PACKAGED SEMICONDUCTOR DEVICES, AND METHOD...

ANTI-DIZZINESS DISPLAY METHOD, PROCESSING DEVICE, AND INFORMATION D...

METHOD AND SYSTEM FOR COMPENSATING ANTI-DIZZINESS PREDICTED IN ADVANCE

METHOD, PROCESSING DEVICE, AND SYSTEM FOR INFORMATION DISPLAY

DISPLAY METHOD AND DISPLAY SYSTEM FOR ANTI-DIZZINESS REFERENCE IMAGE

METHOD FOR SIMULATING SYSTEM AND ASSOCIATED ELECTRONIC DEVICE

METHOD, PROCESSING DEVICE, AND DISPLAY SYSTEM FOR INFORMATION DISPLAY

COMMUNICATION SYSTEM BETWEEN DIES AND OPERATION METHOD THEREOF

Plurality of Different Size Metal Layers for a Pad Structure

TRANSMITTER

AUTOMATED SYSTEMS AND METHODS FOR NATURAL LANGUAGE PROCESSING WITH...

SEMICONDUCTOR STRUCTURE

Interconnect Structures, Packaged Semiconductor Devices, and Method...

METHOD AND DEVICE FOR COMPRESSION BONDING CHIP TO SUBSTRATE

SYSTEM AND METHOD OF TIMING CHARACTERIZATION FOR SEMICONDUCTOR CIRCUIT

SEMICONDUCTOR STRUCTURE

Plurality of Different Size Metal Layers for a Pad Structure

AUTOMATED SYSTEMS AND METHODS FOR NATURAL LANGUAGE PROCESSING WITH...

SYSTEM AND METHOD OF TIMING CHARACTERIZATION FOR SEMICONDUCTOR CIRCUIT

METHOD AND DEVICE FOR COMPRESSION BONDING CHIP TO SUBSTRATE

RELIABILITY TESTING METHOD AND APPARATUS

Integrated Circuit Packages and Methods for Forming the Same

Interconnect Structures, Packaged Semiconductor Devices, and Method...

Plurality of Different Size Metal Layers for a Pad Structure

SEMICONDUCTOR STRUCTURE

Integrated Circuit Packages and Methods for Forming the Same

Packaging Structures of Integrated Circuits

WAFER DICING METHOD

Integrated Circuit Packages and Methods for Forming the Same

Method and Apparatus for Packaging Pad Structure