Chia-Shun Hsiao

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of forming ONO-type sidewall with reduced bird's beak
- Patent number 7,910,429
- Issue date Mar 22, 2011
- Promos Technologies, Inc.
- Zhong Dong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for improving quality of high temperature oxide (HTO) forme...
- Patent number 7,323,729
- Issue date Jan 29, 2008
- ProMOS Technologies Inc.
- Zhong Dong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Use of pedestals to fabricate contact openings
- Patent number 7,300,745
- Issue date Nov 27, 2007
- ProMOS Technologies Inc.
- Chia-Shun Hsiao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for simultaneously fabricating ONO-type memory cell, and gat...
- Patent number 7,297,597
- Issue date Nov 20, 2007
- Promos Technologies, Inc.
- Zhong Dong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Corner protection to reduce wrap around
- Patent number 7,196,381
- Issue date Mar 27, 2007
- Promos Technologies Pte. Ltd.
- Chia-Shun Hsiao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Use of multiple etching steps to reduce lateral etch undercut
- Patent number 7,071,115
- Issue date Jul 4, 2006
- ProMOS Technologies Inc.
- Chunchieh Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for improving quality of semiconductor oxide composition fo...
- Patent number 7,071,127
- Issue date Jul 4, 2006
- Promos Technologies, Inc.
- Zhong Dong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nonvolatile memory structures and fabrication methods
- Patent number 6,962,848
- Issue date Nov 8, 2005
- ProMOS Technologies Inc.
- Chung Wai Leung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Corner protection to reduce wrap around
- Patent number 6,864,148
- Issue date Mar 8, 2005
- Mosel Vitelic, Inc.
- Chia-Shun Hsiao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nonvolatile memory structures and fabrication methods
- Patent number 6,821,847
- Issue date Nov 23, 2004
- Mosel Vitelic, Inc.
- Chung Wai Leung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nonvolatile memory structures and fabrication methods
- Patent number 6,815,760
- Issue date Nov 9, 2004
- Mosel Vitelic, Inc.
- Chung Wai Leung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sidewall protection in fabrication of integrated circuits
- Patent number 6,566,196
- Issue date May 20, 2003
- Mosel Vitelic, Inc.
- Barbara Haselden
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Methods for improving quality of high temperature oxide (HTO) forme...
- Publication number 20060211270
- Publication date Sep 21, 2006
- Zhong Dong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Use of multiple etching steps to reduce lateral etch undercut
- Publication number 20060211255
- Publication date Sep 21, 2006
- Chunchieh Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for simultaneously fabricating ONO-type memory cell, and gat...
- Publication number 20060017092
- Publication date Jan 26, 2006
- ProMos Technologies Inc.
- Zhong Dong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming ONO-type sidewall with reduced bird's beak
- Publication number 20050227437
- Publication date Oct 13, 2005
- ProMos Technologies Inc.
- Zhong Dong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Use of pedestals to fabricate contact openings
- Publication number 20050170578
- Publication date Aug 4, 2005
- Chia-Shun Hsiao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Use of multiple etching steps to reduce lateral etch undercut
- Publication number 20050170646
- Publication date Aug 4, 2005
- Chunchieh Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Corner protection to reduce wrap around
- Publication number 20050133828
- Publication date Jun 23, 2005
- Chia-Shun Hsiao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CORNER PROTECTION TO REDUCE WRAP AROUND
- Publication number 20050054174
- Publication date Mar 10, 2005
- Chia-Shun Hsiao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Floating gate memory structures and fabrication methods
- Publication number 20050037530
- Publication date Feb 17, 2005
- Chia-Shun Hsiao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for improving quality of high temperature oxide (HTO) forme...
- Publication number 20040235295
- Publication date Nov 25, 2004
- Zhong Dong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Nonvolatile memory structures and fabrication methods
- Publication number 20040087088
- Publication date May 6, 2004
- Chung Wai Leung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Floating gate memory structures and fabrication methods
- Publication number 20040065937
- Publication date Apr 8, 2004
- Chia-Shun Hsiao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Nonvolatile memory structures and fabrication methods
- Publication number 20030068859
- Publication date Apr 10, 2003
- Chung Wai Leung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Nonvolatile memory structures and fabrication methods
- Publication number 20030067031
- Publication date Apr 10, 2003
- Chung Wai Leung
- H01 - BASIC ELECTRIC ELEMENTS

Chia-Shun Hsiao

Person

Patents Grantslast 30 patents

Method of forming ONO-type sidewall with reduced bird's beak

Methods for improving quality of high temperature oxide (HTO) forme...

Use of pedestals to fabricate contact openings

Method for simultaneously fabricating ONO-type memory cell, and gat...

Corner protection to reduce wrap around

Use of multiple etching steps to reduce lateral etch undercut

Methods for improving quality of semiconductor oxide composition fo...

Nonvolatile memory structures and fabrication methods

Corner protection to reduce wrap around

Nonvolatile memory structures and fabrication methods

Nonvolatile memory structures and fabrication methods

Sidewall protection in fabrication of integrated circuits

Patents Applicationslast 30 patents

Methods for improving quality of high temperature oxide (HTO) forme...

Use of multiple etching steps to reduce lateral etch undercut

Method for simultaneously fabricating ONO-type memory cell, and gat...

Method of forming ONO-type sidewall with reduced bird's beak

Use of pedestals to fabricate contact openings

Use of multiple etching steps to reduce lateral etch undercut

Corner protection to reduce wrap around

CORNER PROTECTION TO REDUCE WRAP AROUND

Floating gate memory structures and fabrication methods

Methods for improving quality of high temperature oxide (HTO) forme...

Nonvolatile memory structures and fabrication methods

Floating gate memory structures and fabrication methods

Nonvolatile memory structures and fabrication methods

Nonvolatile memory structures and fabrication methods