Chiayao S. Tung

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Current mode digitally variable resistor or programmable VCOM
- Patent number 10,741,142
- Issue date Aug 11, 2020
- IML International
- Alberto Giovanni Viviani
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Current mode DVR or PVCOM with integrated impedances
- Patent number 9,754,550
- Issue date Sep 5, 2017
- IML International
- Alberto Giovanni Viviani
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Current mode DVR or PVCOM with integrated impedances
- Patent number 9,548,723
- Issue date Jan 17, 2017
- IML International
- Alberto Giovanni Viviani
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Short circuits and power limit protection circuits
- Patent number 9,478,978
- Issue date Oct 25, 2016
- IML International
- Chia-Te Fu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Current mode DVR or PVCOM with integrated impedances
- Patent number 9,166,566
- Issue date Oct 20, 2015
- IML International
- Alberto Giovanni Viviani
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Short circuits and power limit protection circuits
- Patent number 9,054,527
- Issue date Jun 9, 2015
- IML International
- Chia-Te Fu
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Current mode DVR or PVCOM with integrated resistors
- Patent number 9,007,098
- Issue date Apr 14, 2015
- IML International
- Alberto Giovanni Viviani
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Short circuits and power limit protection circuits
- Patent number 8,154,346
- Issue date Apr 10, 2012
- IML International Ltd
- Chiayao S. Tung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for multi-symbol interfacing
- Patent number 7,167,527
- Issue date Jan 23, 2007
- Integrated Memory Logic, Inc.
- Yong E. Park
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Universal synchronization clock signal derived using single forward...
- Patent number 7,043,657
- Issue date May 9, 2006
- Integrated Memory Logic, Inc.
- Jeongsik Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for multi-symbol interfacing
- Patent number 6,937,664
- Issue date Aug 30, 2005
- Integrated Memory Logic, Inc.
- Yong E. Park
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Universal synchronization clock signal derived using single forward...
- Patent number 6,647,506
- Issue date Nov 11, 2003
- Integrated Memory Logic, Inc.
- Jeongsik Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for I/O interfacing for semiconductor chip utilizing additio...
- Patent number 6,477,592
- Issue date Nov 5, 2002
- Integrated Memory Logic, Inc.
- Jawji Chen
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Short Circuits and Power Limit Protection Circuits
- Publication number 20110115564
- Publication date May 19, 2011
- Chiayao S. Tung
- H03 - BASIC ELECTRONIC CIRCUITRY

Chiayao S. Tung

Person

Patents Grantslast 30 patents

Current mode digitally variable resistor or programmable VCOM

Current mode DVR or PVCOM with integrated impedances

Current mode DVR or PVCOM with integrated impedances

Short circuits and power limit protection circuits

Current mode DVR or PVCOM with integrated impedances

Short circuits and power limit protection circuits

Current mode DVR or PVCOM with integrated resistors

Short circuits and power limit protection circuits

System and method for multi-symbol interfacing

Universal synchronization clock signal derived using single forward...

System and method for multi-symbol interfacing

Universal synchronization clock signal derived using single forward...

System for I/O interfacing for semiconductor chip utilizing additio...

Patents Applicationslast 30 patents

Short Circuits and Power Limit Protection Circuits