Chieh-Lin CHUANG

Person

Hsinchu City, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Method and device for timestamping and synchronization with high-ac...
- Patent number 11,907,143
- Issue date Feb 20, 2024
- MediaTek Singapore Pte Ltd.
- Hongxu Zhao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor structure having a Si substrate heterointegrated with...
- Patent number 11,342,179
- Issue date May 24, 2022
- National Chiao Tung University
- Edward Yi Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Silicon metal-oxide-semiconductor field effect transistor (Si MOSFE...
- Patent number 11,271,109
- Issue date Mar 8, 2022
- National Chiao Tung University
- Edward Yi Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory management system and memory management method for dynamic m...
- Patent number 10,846,004
- Issue date Nov 24, 2020
- Mediatek Inc.
- Chia-Wei Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for managing memory and associated microcontroller
- Patent number 9,971,510
- Issue date May 15, 2018
- Mediatek Inc.
- Chih-Hsiang Hsiao
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND DEVICE FOR TIMESTAMPING AND SYNCHRONIZATION WITH HIGH-AC...
- Publication number 20220414036
- Publication date Dec 29, 2022
- MEDIATEK SINGAPORE PTE LTD
- Hongxu ZHAO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SILICON METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR (Si MOSFE...
- Publication number 20210159338
- Publication date May 27, 2021
- NATIONAL CHIAO-TUNG UNIVERSITY
- EDWARD YI CHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE HAVING A Si SUBSTRATE HETEROINTEGRATED WITH...
- Publication number 20210118670
- Publication date Apr 22, 2021
- NATIONAL CHIAO TUNG UNIVERSITY
- EDWARD YI CHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE HAVING A Si SUBSTRATE HETEROINTEGRATED WITH...
- Publication number 20200373153
- Publication date Nov 26, 2020
- NATIONAL CHIAO-TUNG UNIVERSITY
- EDWARD YI CHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY MANAGEMENT SYSTEM AND MEMORY MANAGEMENT METHOD FOR DYNAMIC M...
- Publication number 20190339892
- Publication date Nov 7, 2019
- MEDIATEK INC.
- Chia-Wei Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR MANAGING MEMORY AND ASSOCIATED MICROCONTROLLER
- Publication number 20180107399
- Publication date Apr 19, 2018
- MEDIATEK INC.
- Chih-Hsiang Hsiao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARCHITECTURE AND ACCESS METHOD OF HETEROGENEOUS MEMORIES
- Publication number 20120311250
- Publication date Dec 6, 2012
- NOVATEK MICROELECTRONICS CORP.
- Chieh-Lin CHUANG
- G06 - COMPUTING CALCULATING COUNTING

Chieh-Lin CHUANG

Person

Patents Grantslast 30 patents

Method and device for timestamping and synchronization with high-ac...

Semiconductor structure having a Si substrate heterointegrated with...

Silicon metal-oxide-semiconductor field effect transistor (Si MOSFE...

Memory management system and memory management method for dynamic m...

Method for managing memory and associated microcontroller

Patents Applicationslast 30 patents

METHOD AND DEVICE FOR TIMESTAMPING AND SYNCHRONIZATION WITH HIGH-AC...

SILICON METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR (Si MOSFE...

SEMICONDUCTOR STRUCTURE HAVING A Si SUBSTRATE HETEROINTEGRATED WITH...

SEMICONDUCTOR STRUCTURE HAVING A Si SUBSTRATE HETEROINTEGRATED WITH...

MEMORY MANAGEMENT SYSTEM AND MEMORY MANAGEMENT METHOD FOR DYNAMIC M...

METHOD FOR MANAGING MEMORY AND ASSOCIATED MICROCONTROLLER

ARCHITECTURE AND ACCESS METHOD OF HETEROGENEOUS MEMORIES