Chien Chi TIEN

Person

Hsinchu City, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Header layout design including backside power rail
- Patent number 12,136,466
- Issue date Nov 5, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Haruki Mori
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor probe
- Patent number 12,078,658
- Issue date Sep 3, 2024
- Chien Cheng Tien
- G01 - MEASURING TESTING
Information Patent Grant
Power switch circuit, IC structure of power switch circuit, and met...
- Patent number 11,855,619
- Issue date Dec 26, 2023
- Taiwan Semiconductor Manufacturing Company Ltd.
- Tzung-Yo Hung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Header layout design including backside power rail
- Patent number 11,715,501
- Issue date Aug 1, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Haruki Mori
- G11 - INFORMATION STORAGE
Information Patent Grant
Header layout design including backside power rail
- Patent number 11,398,257
- Issue date Jul 26, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Haruki Mori
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Layout of static random access memory periphery circuit
- Patent number 11,342,340
- Issue date May 24, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd
- Yangsyu Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier layout for FinFET technology
- Patent number 11,238,905
- Issue date Feb 1, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yen-Huei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Layout of static random access memory periphery circuit
- Patent number 10,818,677
- Issue date Oct 27, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd
- Yangsyu Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sense amplifier layout for FinFET technology
- Patent number 10,636,458
- Issue date Apr 28, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yen-Huei Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sense amplifier layout for FinFET technology
- Patent number 10,032,490
- Issue date Jul 24, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yen-Huei Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Device having multiple-layer pins in memory MUX1 layout
- Patent number 9,589,885
- Issue date Mar 7, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hung-Jen Liao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sense amplifier layout for FinFET technology
- Patent number 9,466,493
- Issue date Oct 11, 2016
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yen-Huei Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell array
- Patent number 9,287,276
- Issue date Mar 15, 2016
- Taiwan Semiconductor Manufacturing Co., Ltd
- Shi-Wei Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Device having multiple-layer pins in memory MUX1 layout
- Patent number 9,129,956
- Issue date Sep 8, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hung-Jen Liao
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
POWER SWITCH CIRCUIT, IC STRUCTURE OF POWER SWITCH CIRCUIT, AND MET...
- Publication number 20240056074
- Publication date Feb 15, 2024
- Taiwan Semiconductor Manufacturing company Ltd.
- TZUNG-YO HUNG
- B82 - NANO-TECHNOLOGY
Information Patent Application
HEADER LAYOUT DESIGN INCLUDING BACKSIDE POWER RAIL
- Publication number 20230410851
- Publication date Dec 21, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Haruki MORI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HEADER LAYOUT DESIGN INCLUDING BACKSIDE POWER RAIL
- Publication number 20220328077
- Publication date Oct 13, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Haruki MORI
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR PROBE
- Publication number 20210333309
- Publication date Oct 28, 2021
- CHIEN CHENG TIEN
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUIT AND METHOD OF FORMING SAME
- Publication number 20210279396
- Publication date Sep 9, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Po-Sheng WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER SWITCH CIRCUIT, IC STRUCTURE OF POWER SWITCH CIRCUIT, AND MET...
- Publication number 20210218398
- Publication date Jul 15, 2021
- Taiwan Semiconductor Manufacturing company Ltd.
- TZUNG-YO HUNG
- B82 - NANO-TECHNOLOGY
Information Patent Application
HEADER LAYOUT DESIGN INCLUDING BACKSIDE POWER RAIL
- Publication number 20210201961
- Publication date Jul 1, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Haruki MORI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LAYOUT OF STATIC RANDOM ACCESS MEMORY PERIPHERY CIRCUIT
- Publication number 20210057423
- Publication date Feb 25, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yangsyu LIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SENSE AMPLIFIER LAYOUT FOR FINFET TECHNOLOGY
- Publication number 20200227095
- Publication date Jul 16, 2020
- Taiwan Semiconductor Manufacturing Co., LTD
- Yen-Huei CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
LAYOUT OF STATIC RANDOM ACCESS MEMORY PERIPHERY CIRCUIT
- Publication number 20200020700
- Publication date Jan 16, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yangsyu LIN
- G11 - INFORMATION STORAGE
Information Patent Application
SENSE AMPLIFIER LAYOUT FOR FINFET TECHNOLOGY
- Publication number 20180330765
- Publication date Nov 15, 2018
- Taiwan Semiconductor Manufacturing Co., LTD
- Yen-Huei CHEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SENSE AMPLIFIER LAYOUT FOR FINFET TECHNOLOGY
- Publication number 20170032827
- Publication date Feb 2, 2017
- Taiwan Semiconductor Manufacturing Co., LTD
- Yen-Huei CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
DEVICE HAVING MULTIPLE-LAYER PINS IN MEMORY MUX1 LAYOUT
- Publication number 20150364412
- Publication date Dec 17, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hung-Jen LIAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE HAVING MULTIPLE-LAYER PINS IN MEMORY MUX1 LAYOUT
- Publication number 20150162273
- Publication date Jun 11, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hung-Jen LIAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY CELL ARRAY
- Publication number 20150021701
- Publication date Jan 22, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Shi-Wei CHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SENSE AMPLIFIER LAYOUT FOR FINFET TECHNOLOGY
- Publication number 20150015335
- Publication date Jan 15, 2015
- Taiwan Semiconductor Manufacturing Co., LTD
- Yen-Huei CHEN
- H01 - BASIC ELECTRIC ELEMENTS

Chien Chi TIEN

Person

Patents Grantslast 30 patents

Header layout design including backside power rail

Semiconductor probe

Power switch circuit, IC structure of power switch circuit, and met...

Header layout design including backside power rail

Header layout design including backside power rail

Layout of static random access memory periphery circuit

Sense amplifier layout for FinFET technology

Layout of static random access memory periphery circuit

Sense amplifier layout for FinFET technology

Sense amplifier layout for FinFET technology

Device having multiple-layer pins in memory MUX1 layout

Sense amplifier layout for FinFET technology

Memory cell array

Device having multiple-layer pins in memory MUX1 layout

Patents Applicationslast 30 patents

POWER SWITCH CIRCUIT, IC STRUCTURE OF POWER SWITCH CIRCUIT, AND MET...

HEADER LAYOUT DESIGN INCLUDING BACKSIDE POWER RAIL

HEADER LAYOUT DESIGN INCLUDING BACKSIDE POWER RAIL

SEMICONDUCTOR PROBE

INTEGRATED CIRCUIT AND METHOD OF FORMING SAME

POWER SWITCH CIRCUIT, IC STRUCTURE OF POWER SWITCH CIRCUIT, AND MET...

HEADER LAYOUT DESIGN INCLUDING BACKSIDE POWER RAIL

LAYOUT OF STATIC RANDOM ACCESS MEMORY PERIPHERY CIRCUIT

SENSE AMPLIFIER LAYOUT FOR FINFET TECHNOLOGY

LAYOUT OF STATIC RANDOM ACCESS MEMORY PERIPHERY CIRCUIT

SENSE AMPLIFIER LAYOUT FOR FINFET TECHNOLOGY

SENSE AMPLIFIER LAYOUT FOR FINFET TECHNOLOGY

DEVICE HAVING MULTIPLE-LAYER PINS IN MEMORY MUX1 LAYOUT

DEVICE HAVING MULTIPLE-LAYER PINS IN MEMORY MUX1 LAYOUT

MEMORY CELL ARRAY

SENSE AMPLIFIER LAYOUT FOR FINFET TECHNOLOGY