Chien-Chuan Wei

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Package assembly including a semiconductor substrate in which a fir...
- Patent number 9,768,144
- Issue date Sep 19, 2017
- Marvell World Trade Ltd.
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recessed semiconductor substrates and associated techniques
- Patent number 9,391,045
- Issue date Jul 12, 2016
- Marvell World Trade Ltd.
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package assembly having a semiconductor substrate
- Patent number 9,275,929
- Issue date Mar 1, 2016
- Marvell World Trade Ltd.
- Shiann-Ming Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package assembly including a semiconductor substrate in which a fir...
- Patent number 9,257,410
- Issue date Feb 9, 2016
- Marvell World Trade Ltd.
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reducing source contact to gate spacing to decrease transistor pitch
- Patent number 9,245,961
- Issue date Jan 26, 2016
- Marvell International Ltd.
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Recessed semiconductor substrates and associated techniques
- Patent number 9,034,730
- Issue date May 19, 2015
- Marvell World Trade Ltd.
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reducing source contact to gate spacing to decrease transistor pitch
- Patent number 8,999,786
- Issue date Apr 7, 2015
- Marvell International Ltd.
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods and apparatus for etching photo-resist material through mul...
- Patent number 8,753,976
- Issue date Jun 17, 2014
- Marvell International Ltd.
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High-density patterning
- Patent number 8,609,528
- Issue date Dec 17, 2013
- Marvell International Ltd.
- Pantas Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Alpha shielding techniques and configurations
- Patent number 8,603,861
- Issue date Dec 10, 2013
- Marvell World Trade Ltd.
- Nelson Tam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for forming a plurality of contact holes in a microelectron...
- Patent number 8,501,619
- Issue date Aug 6, 2013
- Marvell International Ltd.
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Alpha shielding techniques and configurations
- Patent number 8,368,214
- Issue date Feb 5, 2013
- Marvell World Trade Ltd.
- Nelson Tam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form high density phase change memory (PCM) top contact e...
- Patent number 8,030,128
- Issue date Oct 4, 2011
- Marvell International Ltd.
- Pantas Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for forming a plurality of contact holes in a microelectric...
- Patent number 8,003,523
- Issue date Aug 23, 2011
- Marvell International Ltd.
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High-density patterning
- Patent number 7,994,052
- Issue date Aug 9, 2011
- Marvell International Ltd.
- Pantas Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to form wide heater trenches and to form memory cells to en...
- Patent number 7,985,616
- Issue date Jul 26, 2011
- Marvell International Ltd.
- Pantas Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density via and metal interconnect structures, and methods of...
- Patent number 7,939,445
- Issue date May 10, 2011
- Marvell International Ltd.
- Pantas Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ion implantation and process sequence to form smaller base pick-up
- Patent number 7,939,414
- Issue date May 10, 2011
- Marvell International Ltd.
- Pantas Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form high efficiency GST cell using a double heater cut
- Patent number 7,888,166
- Issue date Feb 15, 2011
- Marvell World Trade Ltd.
- Pantas Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low base resistance bipolar junction transistor array
- Patent number 7,863,709
- Issue date Jan 4, 2011
- Marvell International Ltd.
- Pantas Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Phase change material (PCM) memory devices with bipolar junction tr...
- Patent number 7,834,341
- Issue date Nov 16, 2010
- Marvell World Trade Ltd.
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ion implantation and process sequence to form smaller base pick-up
- Patent number 7,807,539
- Issue date Oct 5, 2010
- Marvell International Ltd.
- Pantas Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ultra high density phase change memory having improved emitter cont...
- Patent number 7,745,809
- Issue date Jun 29, 2010
- Marvell International Ltd.
- Pantas Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to form high efficiency GST cell using a double heater cut
- Patent number 7,709,835
- Issue date May 4, 2010
- Marvell World Trade Ltd.
- Pantas Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High-density contact holes
- Patent number 7,704,875
- Issue date Apr 27, 2010
- Marvell International Ltd.
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PACKAGE ASSEMBLY INCLUDING A SEMICONDUCTOR SUBSTRATE IN WHICH A FIR...
- Publication number 20160155732
- Publication date Jun 2, 2016
- Marvell World Trade Ltd.
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RECESSED SEMICONDUCTOR SUBSTRATES AND ASSOCIATED TECHNIQUES
- Publication number 20150279806
- Publication date Oct 1, 2015
- Marvell World Trade Ltd.
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE ASSEMBLY HAVING A SEMICONDUCTOR SUBSTRATE
- Publication number 20150221577
- Publication date Aug 6, 2015
- Marvell World Trade Ltd.
- Shiann-Ming Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNIQUES AND CONFIGURATIONS FOR RECESSED SEMICONDUCTOR SUBSTRATES
- Publication number 20140124961
- Publication date May 8, 2014
- Marvell World Trade Ltd.
- Albert WU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ALPHA SHIELDING TECHNIQUES AND CONFIGURATIONS
- Publication number 20130143366
- Publication date Jun 6, 2013
- Nelson Tam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE ASSEMBLY INCLUDING A SEMICONDUCTOR SUBSTRATE WITH STRESS RE...
- Publication number 20130026609
- Publication date Jan 31, 2013
- Marvell World Trade Ltd.
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNIQUES AND CONFIGURATIONS FOR RECESSED SEMICONDUCTOR SUBSTRATES
- Publication number 20110186960
- Publication date Aug 4, 2011
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RECESSED SEMICONDUCTOR SUBSTRATES AND ASSOCIATED TECHNIQUES
- Publication number 20110186992
- Publication date Aug 4, 2011
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RECESSED SEMICONDUCTOR SUBSTRATES
- Publication number 20110186998
- Publication date Aug 4, 2011
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE ASSEMBLY HAVING A SEMICONDUCTOR SUBSTRATE
- Publication number 20110175218
- Publication date Jul 21, 2011
- Shiann-Ming Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO FORM HIGH EFFICIENCY GST CELL USING A DOUBLE HEATER CUT
- Publication number 20100173452
- Publication date Jul 8, 2010
- Pantas Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ALPHA SHIELDING TECHNIQUES AND CONFIGURATIONS
- Publication number 20100140760
- Publication date Jun 10, 2010
- Nelson Tam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD TO FORM HIGH EFFICIENCY GST CELL USING A DOUBLE HEATER CUT
- Publication number 20080246015
- Publication date Oct 9, 2008
- Pantas Sutardja
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PHASE CHANGE MATERIAL (PCM) MEMORY DEVICES WITH BIPOLAR JUNCTION TR...
- Publication number 20080185570
- Publication date Aug 7, 2008
- Albert Wu
- H01 - BASIC ELECTRIC ELEMENTS

Chien-Chuan Wei

Person

Patents Grantslast 30 patents

Package assembly including a semiconductor substrate in which a fir...

Recessed semiconductor substrates and associated techniques

Package assembly having a semiconductor substrate

Package assembly including a semiconductor substrate in which a fir...

Reducing source contact to gate spacing to decrease transistor pitch

Recessed semiconductor substrates and associated techniques

Reducing source contact to gate spacing to decrease transistor pitch

Methods and apparatus for etching photo-resist material through mul...

High-density patterning

Alpha shielding techniques and configurations

Methods for forming a plurality of contact holes in a microelectron...

Alpha shielding techniques and configurations

Method to form high density phase change memory (PCM) top contact e...

Methods for forming a plurality of contact holes in a microelectric...

High-density patterning

Methods to form wide heater trenches and to form memory cells to en...

High density via and metal interconnect structures, and methods of...

Ion implantation and process sequence to form smaller base pick-up

Method to form high efficiency GST cell using a double heater cut

Low base resistance bipolar junction transistor array

Phase change material (PCM) memory devices with bipolar junction tr...

Ion implantation and process sequence to form smaller base pick-up

Ultra high density phase change memory having improved emitter cont...

Method to form high efficiency GST cell using a double heater cut

High-density contact holes

Patents Applicationslast 30 patents

PACKAGE ASSEMBLY INCLUDING A SEMICONDUCTOR SUBSTRATE IN WHICH A FIR...

RECESSED SEMICONDUCTOR SUBSTRATES AND ASSOCIATED TECHNIQUES

PACKAGE ASSEMBLY HAVING A SEMICONDUCTOR SUBSTRATE

TECHNIQUES AND CONFIGURATIONS FOR RECESSED SEMICONDUCTOR SUBSTRATES

ALPHA SHIELDING TECHNIQUES AND CONFIGURATIONS

PACKAGE ASSEMBLY INCLUDING A SEMICONDUCTOR SUBSTRATE WITH STRESS RE...

TECHNIQUES AND CONFIGURATIONS FOR RECESSED SEMICONDUCTOR SUBSTRATES

RECESSED SEMICONDUCTOR SUBSTRATES AND ASSOCIATED TECHNIQUES

RECESSED SEMICONDUCTOR SUBSTRATES

PACKAGE ASSEMBLY HAVING A SEMICONDUCTOR SUBSTRATE

METHOD TO FORM HIGH EFFICIENCY GST CELL USING A DOUBLE HEATER CUT

ALPHA SHIELDING TECHNIQUES AND CONFIGURATIONS

METHOD TO FORM HIGH EFFICIENCY GST CELL USING A DOUBLE HEATER CUT

PHASE CHANGE MATERIAL (PCM) MEMORY DEVICES WITH BIPOLAR JUNCTION TR...