Chih-Jiu Peng

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Mechanism for forward data in a processor pipeline using a single p...
- Patent number 6,633,971
- Issue date Oct 14, 2003
- Hitachi, Ltd.
- Chih-Jui Peng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microcomputer/floating point processor interface and method
- Patent number 6,542,983
- Issue date Apr 1, 2003
- Hitachi, Ltd.
- Margaret Rose Gearty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronized instruction advancement through CPU and FPU pipelines
- Patent number 6,477,638
- Issue date Nov 5, 2002
- Hitachi, Ltd.
- Margaret Rose Gearty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for selecting and using source operands in comput...
- Patent number 6,457,118
- Issue date Sep 24, 2002
- Hitachi Ltd.
- Chih-Jui Peng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Emulating execution of smaller fixed-length branch/delay slot instr...
- Patent number 6,449,712
- Issue date Sep 10, 2002
- Hitachi, Ltd.
- Naohiko Irie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for fast access to control space in a pipeline processor
- Patent number 6,408,381
- Issue date Jun 18, 2002
- Hitachi, Ltd.
- Margaret Gearty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for invalidating instruction cache blocks in a pipeline p...
- Patent number 6,393,523
- Issue date May 21, 2002
- Hitachi Ltd.
- Chih-Jui Peng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for power efficient processing in a pipeline processor
- Patent number 6,351,803
- Issue date Feb 26, 2002
- Hitachi Ltd.
- Chih-Jui Peng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system in data processing system of permitting concurren...
- Patent number 5,974,535
- Issue date Oct 26, 1999
- International Business Machines Corporation
- Chih-Jui Ray Peng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fully associative address translation buffer having separate segmen...
- Patent number 5,682,495
- Issue date Oct 28, 1997
- International Business Machines Corporation
- Brad B. Beavers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single array address translator with segment and page invalidate ab...
- Patent number 5,604,879
- Issue date Feb 18, 1997
- Motorola Inc.
- Brad Beavers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address translator with by-pass circuit and method of operation
- Patent number 5,535,351
- Issue date Jul 9, 1996
- Motorola, Inc.
- Chih-Jui Peng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address translator and method of operation
- Patent number 5,530,822
- Issue date Jun 25, 1996
- Motorola, Inc.
- Brad Beavers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Address translation circuit
- Patent number 5,530,824
- Issue date Jun 25, 1996
- Motorola, Inc.
- Chih-Jiu Peng
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MECHANISM FOR INSTRUCTION DATA FORWARDING IN A PIPELINE PROCESSOR
- Publication number 20030154364
- Publication date Aug 14, 2003
- CHIH-JUI PENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MICROCOMPUTER/FLOATING POINT PROCESSOR INTERFACE AND METHOD FOR SYN...
- Publication number 20020161985
- Publication date Oct 31, 2002
- Margaret Rose Gearty
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM AND METHOD FOR PIPELINE CONTROL IN A PROCESSOR
- Publication number 20020056034
- Publication date May 9, 2002
- MARGARET GEARTY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM FOR POWER EFFICIENT PROCESSING IN A PIPELINE PROCESSOR
- Publication number 20010054139
- Publication date Dec 20, 2001
- CHIH-JUI PENG
- G06 - COMPUTING CALCULATING COUNTING

Chih-Jiu Peng

Person

Patents Grantslast 30 patents

Mechanism for forward data in a processor pipeline using a single p...

Microcomputer/floating point processor interface and method

Synchronized instruction advancement through CPU and FPU pipelines

Method and system for selecting and using source operands in comput...

Emulating execution of smaller fixed-length branch/delay slot instr...

Mechanism for fast access to control space in a pipeline processor

Mechanism for invalidating instruction cache blocks in a pipeline p...

Mechanism for power efficient processing in a pipeline processor

Method and system in data processing system of permitting concurren...

Fully associative address translation buffer having separate segmen...

Single array address translator with segment and page invalidate ab...

Address translator with by-pass circuit and method of operation

Address translator and method of operation

Address translation circuit

Patents Applicationslast 30 patents

MECHANISM FOR INSTRUCTION DATA FORWARDING IN A PIPELINE PROCESSOR

MICROCOMPUTER/FLOATING POINT PROCESSOR INTERFACE AND METHOD FOR SYN...

MECHANISM AND METHOD FOR PIPELINE CONTROL IN A PROCESSOR

MECHANISM FOR POWER EFFICIENT PROCESSING IN A PIPELINE PROCESSOR