Chih-Yuan Stephen YU

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Systems and methods for generating synthesizable netlists from regi...
- Patent number 12,175,175
- Issue date Dec 24, 2024
- Taiwan Semiconductor Manufacturing Company Limited
- Boh-Yi Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for mapping foundational components during des...
- Patent number 12,169,671
- Issue date Dec 17, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chih-yuan Stephen Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit synthesis optimization for implements on integrated circuit
- Patent number 11,900,037
- Issue date Feb 13, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chao-Chun Lo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for mapping foundational components during des...
- Patent number 11,783,104
- Issue date Oct 10, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chih-yuan Stephen Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for mapping foundational components during des...
- Patent number 11,403,448
- Issue date Aug 2, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chih-yuan Stephen Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit synthesis optimization for implements on integrated circuit
- Patent number 11,347,920
- Issue date May 31, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chao-Chun Lo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for speeding up gate-level simulation
- Patent number 10,540,462
- Issue date Jan 21, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chih-Yuan Stephen Yu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Circuit Synthesis Optimization for Implements on Integrated Circuit
- Publication number 20240135078
- Publication date Apr 25, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chao-Chun Lo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR MAPPING FOUNDATIONAL COMPONENTS DURING DES...
- Publication number 20240037302
- Publication date Feb 1, 2024
- TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Chih-yuan Stephen YU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR MAPPING FOUNDATIONAL COMPONENTS DURING DES...
- Publication number 20220414304
- Publication date Dec 29, 2022
- TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Chih-yuan Stephen YU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit Synthesis Optimization for Implements on Integrated Circuit
- Publication number 20220284162
- Publication date Sep 8, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chao-Chun Lo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit Synthesis Optimization for Implements on Integrated Circuit
- Publication number 20220121798
- Publication date Apr 21, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chao-Chun Lo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Attribute-Point-Based Timing Constraint Formal Verification
- Publication number 20220083717
- Publication date Mar 17, 2022
- Taiwan Semiconductor Manufacturing Company Limited
- Chao-Chun Lo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and Methods for Generating Synthesizable Netlists From Regi...
- Publication number 20220012392
- Publication date Jan 13, 2022
- Taiwan Semiconductor Manufacturing Company Limited
- Boh-Yi Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SPEEDING UP GATE-LEVEL SIMULATION
- Publication number 20180165394
- Publication date Jun 14, 2018
- Taiwan Semiconductor Manufacturing Co., LTD
- Chih-Yuan Stephen YU
- G06 - COMPUTING CALCULATING COUNTING

Chih-Yuan Stephen YU

Person

Patents Grantslast 30 patents

Systems and methods for generating synthesizable netlists from regi...

Apparatus and method for mapping foundational components during des...

Circuit synthesis optimization for implements on integrated circuit

Apparatus and method for mapping foundational components during des...

Apparatus and method for mapping foundational components during des...

Circuit synthesis optimization for implements on integrated circuit

Method and apparatus for speeding up gate-level simulation

Patents Applicationslast 30 patents

Circuit Synthesis Optimization for Implements on Integrated Circuit

APPARATUS AND METHOD FOR MAPPING FOUNDATIONAL COMPONENTS DURING DES...

APPARATUS AND METHOD FOR MAPPING FOUNDATIONAL COMPONENTS DURING DES...

Circuit Synthesis Optimization for Implements on Integrated Circuit

Circuit Synthesis Optimization for Implements on Integrated Circuit

Attribute-Point-Based Timing Constraint Formal Verification

Systems and Methods for Generating Synthesizable Netlists From Regi...

METHOD AND APPARATUS FOR SPEEDING UP GATE-LEVEL SIMULATION