Chin Chuan Neo

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Patents Grantslast 30 patents

Information Patent Grant
Integrated circuits with magnetic tunnel junction memory cells and...
- Patent number 10,062,733
- Issue date Aug 28, 2018
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Wanbing Yi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with aluminum via structures and methods for fa...
- Patent number 9,917,027
- Issue date Mar 13, 2018
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Wanbing Yi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a via contact
- Patent number 9,805,971
- Issue date Oct 31, 2017
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Rui Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Etch bias control
- Patent number 9,520,299
- Issue date Dec 13, 2016
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Wanbing Yi
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method to fabricate aligned dual damascene openings
- Patent number 7,372,156
- Issue date May 13, 2008
- Chartered Semiconductor Manufacturing Ltd.
- Yeow Kheng Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to fabricate aligned dual damascene openings
- Patent number 6,967,156
- Issue date Nov 22, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Yeow Kheng Lim
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUITS WITH ALUMINUM VIA STRUCTURES AND METHODS FOR FA...
- Publication number 20170194229
- Publication date Jul 6, 2017
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Wanbing Yi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RELIABLE CONTACTS
- Publication number 20160276213
- Publication date Sep 22, 2016
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Rui LI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ETCH BIAS CONTROL
- Publication number 20160189971
- Publication date Jun 30, 2016
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Wanbing Yi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to fabricate aligned dual damacene openings
- Publication number 20060003573
- Publication date Jan 5, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Yeow Kheng Lim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method to fabricate aligned dual damascene openings
- Publication number 20050090095
- Publication date Apr 28, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Yeow Kheng Lim
- H01 - BASIC ELECTRIC ELEMENTS