Chin Hock TOH

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Sealing structure for workpiece to substrate bonding in a processin...
- Patent number 10,978,334
- Issue date Apr 13, 2021
- Applied Materials, Inc.
- Chin Hock Toh
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Structure and method of fabricating three-dimensional (3D) metal-in...
- Patent number 9,954,051
- Issue date Apr 24, 2018
- Applied Materials, Inc.
- Guan Huei See
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaging structural member
- Patent number 9,704,726
- Issue date Jul 11, 2017
- UTAC HEADQUARTERS PTE. LTD.
- Chin Hock Toh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Patterned photoresist to attach a carrier wafer to a silicon device...
- Patent number 9,219,044
- Issue date Dec 22, 2015
- Applied Materials, Inc.
- Chin Hock Toh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin substrate and mold compound handling using an electrostatic-ch...
- Patent number 9,202,801
- Issue date Dec 1, 2015
- Applied Materials, Inc.
- Chin Hock Toh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaging structural member
- Patent number 9,142,487
- Issue date Sep 22, 2015
- United Test & Assembly Center Ltd.
- Chin Hock Toh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packages and methods of packaging semiconductor devices
- Patent number 9,117,808
- Issue date Aug 25, 2015
- United Test & Assembly Center Ltd.
- Chin Hock Toh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interposer for semiconductor package
- Patent number 8,772,921
- Issue date Jul 8, 2014
- United Test & Assembly Center Ltd.
- Chin Hock Toh
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Through silicon via dies and packages
- Patent number 8,741,762
- Issue date Jun 3, 2014
- United Test & Assembly Center Ltd.
- Hao Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packages and methods of packaging semiconductor devices
- Patent number 8,703,534
- Issue date Apr 22, 2014
- United Test & Assembly Center Ltd.
- Chin Hock Toh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package and method of packaging semiconductor devices
- Patent number 8,647,924
- Issue date Feb 11, 2014
- United Test & Assembly Center Ltd.
- Chin Hock Toh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Through silicon via dies and packages
- Patent number 8,586,465
- Issue date Nov 19, 2013
- United Test & Assembly Center Ltd.
- Hao Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vented die and package
- Patent number 8,426,246
- Issue date Apr 23, 2013
- United Test & Assembly Center Ltd.
- Chin Hock Toh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Mold design and semiconductor package
- Patent number 8,399,985
- Issue date Mar 19, 2013
- United Test & Assembly Center Ltd.
- Ravi Kanth Kolan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaging structural member
- Patent number 8,384,203
- Issue date Feb 26, 2013
- United Test & Assembly Center Ltd.
- Chin Hock Toh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vented die and package
- Patent number 8,143,719
- Issue date Mar 27, 2012
- United Test & Assembly Center Ltd.
- Chin Hock Toh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interposer for semiconductor package
- Patent number 8,115,292
- Issue date Feb 14, 2012
- United Test & Assembly Center Ltd.
- Chin Hock Toh
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Mold design and semiconductor package
- Patent number 8,030,761
- Issue date Oct 4, 2011
- United Test & Assembly Center Ltd.
- Ravi Kanth Kolan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package and method of making the same
- Patent number 7,948,095
- Issue date May 24, 2011
- United Test & Assembly Center Ltd.
- Catherine Bee Liang Ng
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
STRUCTURE AND METHOD OF FABRICATING THREE-DIMENSIONAL (3D) METAL-IN...
- Publication number 20170104056
- Publication date Apr 13, 2017
- Applied Materials, Inc.
- Guan Huei SEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEALING STRUCTURE FOR WORKPIECE TO SUBSTRATE BONDING IN A PROCESSIN...
- Publication number 20160064267
- Publication date Mar 3, 2016
- Chin Hock Toh
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
PACKAGING STRUCTURAL MEMBER
- Publication number 20160005629
- Publication date Jan 7, 2016
- UTAC Headquarters Pte. Ltd.
- Chin Hock TOH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PATTERNED PHOTORESIST TO ATTACH A CARRIER WAFER TO A SILICON DEVICE...
- Publication number 20150140801
- Publication date May 21, 2015
- Chin Hock Toh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THIN SUBSTRATE AND MOLD COMPOUND HANDLING USING AN ELECTROSTATIC-CH...
- Publication number 20150137383
- Publication date May 21, 2015
- Chin Hock Toh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION OF 3D CHIP STACKS WITHOUT CARRIER PLATES
- Publication number 20140273354
- Publication date Sep 18, 2014
- Applied Materials, Inc.
- Sesh RAMASWAMI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PASSIVATION AND WARPAGE CORRECTION BY NITRIDE FILM FOR MOLDED WAFERS
- Publication number 20140264954
- Publication date Sep 18, 2014
- Loke Yuen WONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES
- Publication number 20140225242
- Publication date Aug 14, 2014
- United Test & Assembly Center Ltd.
- Chin Hock TOH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH SILICON VIA DIES AND PACKAGES
- Publication number 20140045301
- Publication date Feb 13, 2014
- United Test & Assembly Center Ltd.
- Hao LIU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGING STRUCTURAL MEMBER
- Publication number 20130119560
- Publication date May 16, 2013
- United Test & Assembly Center Ltd.
- Chin Hock TOH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES
- Publication number 20120193812
- Publication date Aug 2, 2012
- United Test & Assembly Center Ltd.
- Chin Hock TOH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VENTED DIE AND PACKAGE
- Publication number 20120149150
- Publication date Jun 14, 2012
- United Test & Assembly Center Ltd.
- Chin Hock TOH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERPOSER FOR SEMICONDUCTOR PACKAGE
- Publication number 20120104628
- Publication date May 3, 2012
- United Test & Assembly Center Ltd.
- Chin Hock Toh
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
MOLD DESIGN AND SEMICONDUCTOR PACKAGE
- Publication number 20120018869
- Publication date Jan 26, 2012
- United Test & Assembly Center Ltd.
- Ravi Kanth KOLAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR PACKAGE AND METHOD OF PACKAGING SEMICONDUCTOR DEVICES
- Publication number 20100261313
- Publication date Oct 14, 2010
- United Test & Assembly Center Ltd.
- Chin Hock TOH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERPOSER FOR SEMICONDUCTOR PACKAGE
- Publication number 20100109142
- Publication date May 6, 2010
- United Test & Assembly Center Ltd.
- Chin Hock Toh
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
SEMICONDUCTOR PACKAGE AND METHOD OF MAKING THE SAME
- Publication number 20100109169
- Publication date May 6, 2010
- United Test & Assembly Center Ltd.
- Ravi Kanth KOLAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGING STRUCTURAL MEMBER
- Publication number 20100013081
- Publication date Jan 21, 2010
- United Test & Assembly Center Ltd.
- Chin Hock TOH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH SILICON VIA DIES AND PACKAGES
- Publication number 20080303163
- Publication date Dec 11, 2008
- United Test & Assembly Center Ltd.
- Hao LIU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VENTED DIE AND PACKAGE
- Publication number 20080303031
- Publication date Dec 11, 2008
- United Test & Assembly Center Ltd.
- Chin Hock TOH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOLD DESIGN AND SEMICONDUCTOR PACKAGE
- Publication number 20080290505
- Publication date Nov 27, 2008
- United Test & Assembly Center Ltd.
- Ravi Kanth KOLAN
- H01 - BASIC ELECTRIC ELEMENTS

Chin Hock TOH

Person

Patents Grantslast 30 patents

Sealing structure for workpiece to substrate bonding in a processin...

Structure and method of fabricating three-dimensional (3D) metal-in...

Packaging structural member

Patterned photoresist to attach a carrier wafer to a silicon device...

Thin substrate and mold compound handling using an electrostatic-ch...

Packaging structural member

Semiconductor packages and methods of packaging semiconductor devices

Interposer for semiconductor package

Through silicon via dies and packages

Semiconductor packages and methods of packaging semiconductor devices

Semiconductor package and method of packaging semiconductor devices

Through silicon via dies and packages

Vented die and package

Mold design and semiconductor package

Packaging structural member

Vented die and package

Interposer for semiconductor package

Mold design and semiconductor package

Semiconductor package and method of making the same

Patents Applicationslast 30 patents

STRUCTURE AND METHOD OF FABRICATING THREE-DIMENSIONAL (3D) METAL-IN...

SEALING STRUCTURE FOR WORKPIECE TO SUBSTRATE BONDING IN A PROCESSIN...

PACKAGING STRUCTURAL MEMBER

PATTERNED PHOTORESIST TO ATTACH A CARRIER WAFER TO A SILICON DEVICE...

THIN SUBSTRATE AND MOLD COMPOUND HANDLING USING AN ELECTROSTATIC-CH...

FABRICATION OF 3D CHIP STACKS WITHOUT CARRIER PLATES

PASSIVATION AND WARPAGE CORRECTION BY NITRIDE FILM FOR MOLDED WAFERS

SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES

THROUGH SILICON VIA DIES AND PACKAGES

PACKAGING STRUCTURAL MEMBER

SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES

VENTED DIE AND PACKAGE

INTERPOSER FOR SEMICONDUCTOR PACKAGE

MOLD DESIGN AND SEMICONDUCTOR PACKAGE

SEMICONDUCTOR PACKAGE AND METHOD OF PACKAGING SEMICONDUCTOR DEVICES

INTERPOSER FOR SEMICONDUCTOR PACKAGE

SEMICONDUCTOR PACKAGE AND METHOD OF MAKING THE SAME

PACKAGING STRUCTURAL MEMBER

THROUGH SILICON VIA DIES AND PACKAGES

VENTED DIE AND PACKAGE

MOLD DESIGN AND SEMICONDUCTOR PACKAGE