Chin-Kun Lan

Person

Taichung, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Spacer scheme and method for MRAM
- Patent number 12,310,257
- Issue date May 20, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Joung-Wei Liou
Information Patent Grant
Spacer scheme and method for MRAM
- Patent number 11,818,964
- Issue date Nov 14, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Joung-Wei Liou
Information Patent Grant
Multi-layer mask and method of forming same
- Patent number 11,488,825
- Issue date Nov 1, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Spacer scheme and method for MRAM
- Patent number 11,283,005
- Issue date Mar 22, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer structure having a dense middle layer
- Patent number 11,139,200
- Issue date Oct 5, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer mask and method of forming same
- Patent number 10,748,765
- Issue date Aug 18, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer structure having a dense middle layer
- Patent number 10,510,586
- Issue date Dec 17, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Diffusion region routing for narrow scribe-line devices
- Patent number 8,669,641
- Issue date Mar 11, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ming-Chang Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Diffusion region routing for narrow scribe-line devices
- Patent number 7,968,431
- Issue date Jun 28, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ming-Chang Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Oxygen plasma reduction to eliminate precursor overflow in BPTEOS f...
- Patent number 7,955,993
- Issue date Jun 7, 2011
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chin Kun Lan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Planarization of shallow trench isolation (STI)
- Patent number 6,645,825
- Issue date Nov 11, 2003
- Taiwan Semiconductor Manufacturing Company
- Chin Kun Lan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to solve the delamination of a silicon nitride layer from an...
- Patent number 6,407,007
- Issue date Jun 18, 2002
- Taiwan Semiconductor Manufacturing Company
- Chun-Ching Tsan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for improvement of tungsten chemical-mechanical polishing pr...
- Patent number 6,287,172
- Issue date Sep 11, 2001
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Tong-Hua Kuan
- B24 - GRINDING POLISHING

Patents Applicationslast 30 patents

Information Patent Application
SPACER SCHEME AND METHOD FOR MRAM
- Publication number 20240381784
- Publication date Nov 14, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Joung-Wei Liou
Information Patent Application
Semiconductor Structure Having High Breakdown Voltage Etch-Stop Layer
- Publication number 20240266292
- Publication date Aug 8, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPACER SCHEME AND METHOD FOR MRAM
- Publication number 20240122077
- Publication date Apr 11, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Joung-Wei Liou
Information Patent Application
SPACER SCHEME AND METHOD FOR MRAM
- Publication number 20220209101
- Publication date Jun 30, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-Layer Mask and Method of Forming Same
- Publication number 20200176253
- Publication date Jun 4, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-Layer Structure Having a Dense Middle Layer
- Publication number 20200111703
- Publication date Apr 9, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIFFUSION REGION ROUTING FOR NARROW SCRIBE-LINE DEVICES
- Publication number 20110241179
- Publication date Oct 6, 2011
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ming-Chang Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OXYGEN PLASMA REDUCTION TO ELIMINATE PRECURSOR OVERFLOW IN BPTEOS F...
- Publication number 20100311252
- Publication date Dec 9, 2010
- Chin Kun Lan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIFFUSION REGION ROUTING FOR NARROW SCRIBE-LINE DEVICES
- Publication number 20100013059
- Publication date Jan 21, 2010
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ming-Chang Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Metal-oxide-metal structure with improved capacitive coupling area
- Publication number 20080061343
- Publication date Mar 13, 2008
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chin Kun Lan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device including shallow trench isolator and method o...
- Publication number 20070190742
- Publication date Aug 16, 2007
- Taiwan Semiconductor Manufacturing Company, Ltd.
- You-Hua Chou
- H01 - BASIC ELECTRIC ELEMENTS

Chin-Kun Lan

Person

Patents Grantslast 30 patents

Spacer scheme and method for MRAM

Spacer scheme and method for MRAM

Multi-layer mask and method of forming same

Spacer scheme and method for MRAM

Multi-layer structure having a dense middle layer

Multi-layer mask and method of forming same

Multi-layer structure having a dense middle layer

Diffusion region routing for narrow scribe-line devices

Diffusion region routing for narrow scribe-line devices

Oxygen plasma reduction to eliminate precursor overflow in BPTEOS f...

Planarization of shallow trench isolation (STI)

Method to solve the delamination of a silicon nitride layer from an...

Method for improvement of tungsten chemical-mechanical polishing pr...

Patents Applicationslast 30 patents

SPACER SCHEME AND METHOD FOR MRAM

Semiconductor Structure Having High Breakdown Voltage Etch-Stop Layer

SPACER SCHEME AND METHOD FOR MRAM

SPACER SCHEME AND METHOD FOR MRAM

Multi-Layer Mask and Method of Forming Same

Multi-Layer Structure Having a Dense Middle Layer

DIFFUSION REGION ROUTING FOR NARROW SCRIBE-LINE DEVICES

OXYGEN PLASMA REDUCTION TO ELIMINATE PRECURSOR OVERFLOW IN BPTEOS F...

DIFFUSION REGION ROUTING FOR NARROW SCRIBE-LINE DEVICES

Metal-oxide-metal structure with improved capacitive coupling area

Semiconductor device including shallow trench isolator and method o...