Ching P. Lo

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Palos Verdes Estates, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Chip scale packaging on CTE matched printed wiring boards
- Patent number 6,757,968
- Issue date Jul 6, 2004
- The Boeing Company
- Ching P. Lo
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Preparation of passivated chip-on-board electronic devices
- Patent number 6,573,124
- Issue date Jun 3, 2003
- Hughes Electronics Corp.
- Shih Chou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Chip scale packaging on CTE matched printed wiring boards
- Patent number 6,560,108
- Issue date May 6, 2003
- Hughes Electronics Corporation
- Ching P. Lo
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Integrated circuit assembly having interposer with a compliant layer
- Patent number 6,455,936
- Issue date Sep 24, 2002
- The Boeing Company
- Ching-Ping Lo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reworkable circuit board assembly including a reworkable flip chip
- Patent number 5,953,210
- Issue date Sep 14, 1999
- Hughes Electronics Corporation
- Ching P. Lo
- H01 - BASIC ELECTRIC ELEMENTS