Cho Jin

Person

Palo Alto, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
High-k and p-type work function metal first fabrication process hav...
- Patent number 9,876,089
- Issue date Jan 23, 2018
- International Business Machines Corporation
- Jin Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High-k and p-type work function metal first fabrication process hav...
- Patent number 9,570,318
- Issue date Feb 14, 2017
- International Business Machines Corporation
- Jin Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Test macro for use with a multi-patterning lithography process
- Patent number 9,355,921
- Issue date May 31, 2016
- GLOBALFOUNDRIES Inc.
- Tenko Yamashita
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Methods and apparatus for multi-level cache hierarchies
- Patent number 9,251,070
- Issue date Feb 2, 2016
- Advanced Micro Devices, Inc.
- Jin Haeng Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for fabricating integrated circuits including selectively f...
- Patent number 9,209,037
- Issue date Dec 8, 2015
- GLOBALFOUNDRIES, INC.
- Jason Richard Cantone
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bulk finFET semiconductor-on-nothing integration
- Patent number 9,166,023
- Issue date Oct 20, 2015
- STMicroelectronics, Inc.
- Nicolas Loubet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Test macro for use with a multi-patterning lithography process
- Patent number 9,159,633
- Issue date Oct 13, 2015
- GLOBALFOUNDRIES Inc.
- Tenko Yamashita
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a dielectric cap layer on a metal gate structure
- Patent number 9,117,877
- Issue date Aug 25, 2015
- GLOBALFOUNDRIES Inc.
- Xiuyu Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices having dielectric caps on contacts and relate...
- Patent number 9,041,087
- Issue date May 26, 2015
- GLOBALFOUNDRIES, INC.
- Lei Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating integrated circuits
- Patent number 8,853,037
- Issue date Oct 7, 2014
- GLOBALFOUNDRIES, INC.
- Jin Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming contacts for semiconductor devices using a local...
- Patent number 8,809,184
- Issue date Aug 19, 2014
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming replacement gate structures on semiconductor dev...
- Patent number 8,772,101
- Issue date Jul 8, 2014
- GLOBALFOUNDRIES Inc.
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices having dielectric caps on contacts and relate...
- Patent number 8,765,599
- Issue date Jul 1, 2014
- GLOBALFOUNDRIES, INC.
- Lei Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FinFET formation using double patterning memorization
- Patent number 8,716,094
- Issue date May 6, 2014
- Global Foundries Inc.
- Chang Seo Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device and method thereof
- Patent number 8,464,130
- Issue date Jun 11, 2013
- GlobalFoundries Inc.
- Sang Dhong
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods for fabricating FinFET integrated circuits in bulk semicond...
- Patent number 8,461,008
- Issue date Jun 11, 2013
- GLOBALFOUNDRIES, INC.
- Jin Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FINFET integrated circuits and methods for their fabrication
- Patent number 8,455,307
- Issue date Jun 4, 2013
- GLOBALFOUNDRIES, INC.
- Jin Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Tunneling field effect transistor switch device
- Patent number 8,053,785
- Issue date Nov 8, 2011
- GLOBALFOUNDRIES Inc.
- Jin Cho
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Method of forming fin structures using a sacrificial etch stop laye...
- Patent number 7,871,873
- Issue date Jan 18, 2011
- Global Foundries Inc.
- Witold Maszara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device and method of refreshing
- Patent number 7,724,567
- Issue date May 25, 2010
- Advanced Micro Devices, Inc.
- Sang Dhong
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
HIGH-K AND P-TYPE WORK FUNCTION METAL FIRST FABRICATION PROCESS HAV...
- Publication number 20170025285
- Publication date Jan 26, 2017
- International Business Machines Corporation
- Jin Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH-K AND P-TYPE WORK FUNCTION METAL FIRST FABRICATION PROCESS HAV...
- Publication number 20170025526
- Publication date Jan 26, 2017
- International Business Machines Corporation
- Jin Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFET DEVICE COMPRISING A THERMAL OXIDE REGION POSITIONED BETWEEN...
- Publication number 20150311337
- Publication date Oct 29, 2015
- GLOBALFOUNDRIES INC.
- Xiuyu Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING SELECTIVELY F...
- Publication number 20150255299
- Publication date Sep 10, 2015
- GLOBALFOUNDRIES, Inc.
- Jason Richard Cantone
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TEST MACRO FOR USE WITH A MULTI-PATTERNING LITHOGRAPHY PROCESS
- Publication number 20150140697
- Publication date May 21, 2015
- International Business Machines Corporation
- Tenko Yamashita
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TEST MACRO FOR USE WITH A MULTI-PATTERNING LITHOGRAPHY PROCESS
- Publication number 20150140698
- Publication date May 21, 2015
- International Business Machines Corporation
- Tenko Yamashita
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TEST MACRO FOR USE WITH A MULTI-PATTERNING LITHOGRAPHY PROCESS
- Publication number 20150076498
- Publication date Mar 19, 2015
- Global Foundries, Inc.
- Tenko Yamashita
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BULK FINFET SEMICONDUCTOR-ON-NOTHING INTEGRATION
- Publication number 20150041898
- Publication date Feb 12, 2015
- GLOBALFOUNDRIES INC.
- Nicolas Loubet
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICES HAVING DIELECTRIC CAPS ON CONTACTS AND RELATE...
- Publication number 20140264499
- Publication date Sep 18, 2014
- GLOBAL FOUNDRIES Inc.
- Lei Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUS FOR MULTI-LEVEL CACHE HIERARCHIES
- Publication number 20140173208
- Publication date Jun 19, 2014
- Advanced Micro Devices, Inc.
- Jin Haeng Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FINFET FORMATION USING DOUBLE PATTERNING MEMORIZATION
- Publication number 20140141605
- Publication date May 22, 2014
- GLOBALFOUNDRIES INC.
- Chang Seo PARK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING REPLACEMENT GATE STRUCTURES ON SEMICONDUCTOR DEV...
- Publication number 20140124841
- Publication date May 8, 2014
- International Business Machines Corporation
- Ruilong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING CONTACTS FOR SEMICONDUCTOR DEVICES USING A LOCAL...
- Publication number 20130295756
- Publication date Nov 7, 2013
- GLOBALFOUNDRIES INC.
- Lei Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING INTEGRATED CIRCUITS
- Publication number 20130244387
- Publication date Sep 19, 2013
- GLOBALFOUNDRIES INC.
- Jin CHO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Forming a Dielectric Cap Layer on a Metal Gate Structure
- Publication number 20130181263
- Publication date Jul 18, 2013
- GLOBALFOUNDRIES INC.
- Xiuyu Cai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICES HAVING DIELECTRIC CAPS ON CONTACTS AND RELATE...
- Publication number 20130175583
- Publication date Jul 11, 2013
- GLOBALFOUNDRIES INC.
- Lei Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING FINFET INTEGRATED CIRCUITS IN BULK SEMICOND...
- Publication number 20130045580
- Publication date Feb 21, 2013
- GLOBALFOUNDRIES INC.
- Jin CHO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods of Forming a Replacement Gate Comprised of Silicon and a De...
- Publication number 20130043592
- Publication date Feb 21, 2013
- GLOBALFOUNDRIES INC.
- Chang Seo Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFET INTEGRATED CIRCUITS AND METHODS FOR THEIR FABRICATION
- Publication number 20120292672
- Publication date Nov 22, 2012
- GLOBALFOUNDRIES INC.
- Jin CHO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TUNNELING FIELD EFFECT TRANSISTOR SWITCH DEVICE
- Publication number 20100295058
- Publication date Nov 25, 2010
- GLOBALFOUNDRIES INC.
- Jin CHO
- B82 - NANO-TECHNOLOGY
Information Patent Application
METHOD OF FORMING FIN STRUCTURES USING A SACRIFICIAL ETCH STOP LAYE...
- Publication number 20100248454
- Publication date Sep 30, 2010
- Advanced Micro Devices, Inc.
- Witold MASZARA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DEVICE AND METHOD THEREOF
- Publication number 20100146330
- Publication date Jun 10, 2010
- Advanced Micro check here
- Sang Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE AND METHOD
- Publication number 20100002482
- Publication date Jan 7, 2010
- Advanced Micro Devices, Inc.
- Sang Dhong
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND METHOD OF REFRESHING
- Publication number 20100002502
- Publication date Jan 7, 2010
- Advanced Micro Devices, Inc.
- Sang Dhong
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

High-k and p-type work function metal first fabrication process hav...

High-k and p-type work function metal first fabrication process hav...

Test macro for use with a multi-patterning lithography process

Methods and apparatus for multi-level cache hierarchies

Methods for fabricating integrated circuits including selectively f...

Bulk finFET semiconductor-on-nothing integration

Test macro for use with a multi-patterning lithography process

Methods of forming a dielectric cap layer on a metal gate structure

Semiconductor devices having dielectric caps on contacts and relate...

Methods for fabricating integrated circuits

Methods of forming contacts for semiconductor devices using a local...

Methods of forming replacement gate structures on semiconductor dev...

Semiconductor devices having dielectric caps on contacts and relate...

FinFET formation using double patterning memorization

Memory device and method thereof

Methods for fabricating FinFET integrated circuits in bulk semicond...

FINFET integrated circuits and methods for their fabrication

Tunneling field effect transistor switch device

Method of forming fin structures using a sacrificial etch stop laye...

Memory device and method of refreshing

Patents Applicationslast 30 patents

HIGH-K AND P-TYPE WORK FUNCTION METAL FIRST FABRICATION PROCESS HAV...

HIGH-K AND P-TYPE WORK FUNCTION METAL FIRST FABRICATION PROCESS HAV...

FINFET DEVICE COMPRISING A THERMAL OXIDE REGION POSITIONED BETWEEN...

METHODS FOR FABRICATING INTEGRATED CIRCUITS INCLUDING SELECTIVELY F...

TEST MACRO FOR USE WITH A MULTI-PATTERNING LITHOGRAPHY PROCESS

TEST MACRO FOR USE WITH A MULTI-PATTERNING LITHOGRAPHY PROCESS

TEST MACRO FOR USE WITH A MULTI-PATTERNING LITHOGRAPHY PROCESS

BULK FINFET SEMICONDUCTOR-ON-NOTHING INTEGRATION

SEMICONDUCTOR DEVICES HAVING DIELECTRIC CAPS ON CONTACTS AND RELATE...

METHODS AND APPARATUS FOR MULTI-LEVEL CACHE HIERARCHIES

FINFET FORMATION USING DOUBLE PATTERNING MEMORIZATION

METHODS OF FORMING REPLACEMENT GATE STRUCTURES ON SEMICONDUCTOR DEV...

METHODS OF FORMING CONTACTS FOR SEMICONDUCTOR DEVICES USING A LOCAL...

METHODS FOR FABRICATING INTEGRATED CIRCUITS

Methods of Forming a Dielectric Cap Layer on a Metal Gate Structure

SEMICONDUCTOR DEVICES HAVING DIELECTRIC CAPS ON CONTACTS AND RELATE...

METHODS FOR FABRICATING FINFET INTEGRATED CIRCUITS IN BULK SEMICOND...

Methods of Forming a Replacement Gate Comprised of Silicon and a De...

FINFET INTEGRATED CIRCUITS AND METHODS FOR THEIR FABRICATION

TUNNELING FIELD EFFECT TRANSISTOR SWITCH DEVICE

METHOD OF FORMING FIN STRUCTURES USING A SACRIFICIAL ETCH STOP LAYE...

MEMORY DEVICE AND METHOD THEREOF

MEMORY DEVICE AND METHOD

MEMORY DEVICE AND METHOD OF REFRESHING