Choshu Ito

Person

San Mateo, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methodology for preventing functional failure caused by CDM ESD
- Patent number 9,239,896
- Issue date Jan 19, 2016
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Choshu Ito
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic deskew for bang-bang timing recovery in a communication system
- Patent number 8,929,497
- Issue date Jan 6, 2015
- LSI Corporation
- Erik V. Chmelar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Tap adaptation with a fully unrolled decision feedback equalizer
- Patent number 8,923,382
- Issue date Dec 30, 2014
- LSI Corporation
- Choshu Ito
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit simulation using step response analysis in the frequency do...
- Patent number 8,798,981
- Issue date Aug 5, 2014
- LSI Corporation
- Choshu Ito
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor package having increased resistance to electrostatic...
- Patent number 8,258,016
- Issue date Sep 4, 2012
- LSI Corporation
- Choshu Ito
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Systems and methods for speculative signal equalization
- Patent number 8,121,186
- Issue date Feb 21, 2012
- LSI Corporation
- Erik Chmelar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods for synchronous, retimed analog to digital conv...
- Patent number 7,973,692
- Issue date Jul 5, 2011
- LSI Corporation
- Erik Chmelar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for synchronous, retimed analog to digital conv...
- Patent number 7,956,790
- Issue date Jun 7, 2011
- LSI Corporation
- Erik Chmelar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Electrostatic discharge protection circuit employing a micro electr...
- Patent number 7,944,655
- Issue date May 17, 2011
- LSI Corporation
- Tze Wee Chen
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Circuit protection system
- Patent number 7,777,996
- Issue date Aug 17, 2010
- LSI Corporation
- William M. Loh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Analog-to-digital converter having reduced number of activated comp...
- Patent number 7,696,915
- Issue date Apr 13, 2010
- Agere Systems Inc.
- Erik Chmelar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for pipelined analog to digital conversion
- Patent number 7,656,340
- Issue date Feb 2, 2010
- LSI Corporation
- Sergey Gribok
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Electrostatic discharge series protection
- Patent number 7,551,414
- Issue date Jun 23, 2009
- LSI Corporation
- William M. Loh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package having increased resistance to electrostatic...
- Patent number 7,498,664
- Issue date Mar 3, 2009
- LSI Corporation
- Choshu Ito
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CDM ESD event protection in application circuits
- Patent number 7,493,576
- Issue date Feb 17, 2009
- LSI Corporation
- William Loh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
CDM ESD event simulation and remediation thereof in application cir...
- Patent number 7,458,044
- Issue date Nov 25, 2008
- LSI Corporation
- Choshu Ito
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electrostatic discharge testing
- Patent number 7,375,543
- Issue date May 20, 2008
- LSI Corporation
- Choshu Ito
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS FOR PERFORMING LAYOUT DESIGNS USING STEM CELLS
- Publication number 20190211475
- Publication date Jul 11, 2019
- TOTIC TECHNOLOGY INC.
- Choshu Ito
- C12 - BIOCHEMISTRY BEER SPIRITS WINE VINEGAR MICROBIOLOGY ENZYMOLOGY MUTATION...
Information Patent Application
BAUD RATE TIMING RECOVERY FOR NYQUIST PATTERNS IN A COMMUNICATION S...
- Publication number 20130243107
- Publication date Sep 19, 2013
- LSI CORPORATION
- Erik V. Chmelar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DYNAMIC DESKEW FOR BANG-BANG TIMING RECOVERY IN A COMMUNICATION SYSTEM
- Publication number 20130243127
- Publication date Sep 19, 2013
- LSI CORPORATION
- Erik V. Chmelar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
VOLTAGE MARGIN BASED BAUD RATE TIMING RECOVERY IN A COMMUNICATION S...
- Publication number 20130243056
- Publication date Sep 19, 2013
- LSI CORPORATION
- Erik V. Chmelar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TAP ADAPTATION WITH A FULLY UNROLLED DECISION FEEDBACK EQUALIZER
- Publication number 20130243070
- Publication date Sep 19, 2013
- LSI CORPORATION
- Choshu Ito
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Systems and Methods for Synchronous, Retimed Analog to Digital Conv...
- Publication number 20100195776
- Publication date Aug 5, 2010
- Erik Chmelar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Systems and Methods for Synchronous, Retimed Analog to Digital Conv...
- Publication number 20100194616
- Publication date Aug 5, 2010
- Erik Chmelar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DESIGN METHODOLOGY FOR PREVENTING FUNCTIONAL FAILURE CAUSED BY CDM ESD
- Publication number 20100100859
- Publication date Apr 22, 2010
- LSI Corporation
- Choshu Ito
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit Simulation Using Step Response Analysis in the Frequency Do...
- Publication number 20090319251
- Publication date Dec 24, 2009
- Choshu Ito
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PIPELINED ANALOG TO DIGITAL CONVERSION
- Publication number 20090303093
- Publication date Dec 10, 2009
- LSI CORPORATION
- Sergey Gribok
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Systems and Methods for Speculative Signal Equalization
- Publication number 20090304066
- Publication date Dec 10, 2009
- LSI CORPORATION
- Erik Chmelar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Electrostatic Discharge Protection Circuit Employing a Micro Electr...
- Publication number 20090296292
- Publication date Dec 3, 2009
- Tze Wee Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Analog-to-Digital Converter
- Publication number 20090267821
- Publication date Oct 29, 2009
- Erik Chmelar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SEMICONDUCTOR PACKAGE HAVING INCREASED RESISTANCE TO ELECTROSTATIC...
- Publication number 20090104735
- Publication date Apr 23, 2009
- LSI Logic Corporation
- Choshu Ito
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electrostatic discharge series protection
- Publication number 20070138973
- Publication date Jun 21, 2007
- William M. Loh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor package having increased resistance to electrostatic...
- Publication number 20070132083
- Publication date Jun 14, 2007
- LSI Logic Corporation
- Choshu Ito
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Electrostatic discharge testing
- Publication number 20070018670
- Publication date Jan 25, 2007
- Choshu Ito
- G01 - MEASURING TESTING
Information Patent Application
Circuit protection system
- Publication number 20070019345
- Publication date Jan 25, 2007
- William M. Loh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CDM ESD event protection in application circuits
- Publication number 20060245126
- Publication date Nov 2, 2006
- LSI Logic Corporation
- William Loh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CDM ESD event simulation and remediation thereof in application cir...
- Publication number 20060245127
- Publication date Nov 2, 2006
- LSI Logic Corporation
- Choshu Ito
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Methodology for preventing functional failure caused by CDM ESD

Dynamic deskew for bang-bang timing recovery in a communication system

Tap adaptation with a fully unrolled decision feedback equalizer

Circuit simulation using step response analysis in the frequency do...

Semiconductor package having increased resistance to electrostatic...

Systems and methods for speculative signal equalization

Systems and methods for synchronous, retimed analog to digital conv...

Systems and methods for synchronous, retimed analog to digital conv...

Electrostatic discharge protection circuit employing a micro electr...

Circuit protection system

Analog-to-digital converter having reduced number of activated comp...

Systems and methods for pipelined analog to digital conversion

Electrostatic discharge series protection

Semiconductor package having increased resistance to electrostatic...

CDM ESD event protection in application circuits

CDM ESD event simulation and remediation thereof in application cir...

Electrostatic discharge testing

Patents Applicationslast 30 patents

METHOD AND APPARATUS FOR PERFORMING LAYOUT DESIGNS USING STEM CELLS

BAUD RATE TIMING RECOVERY FOR NYQUIST PATTERNS IN A COMMUNICATION S...

DYNAMIC DESKEW FOR BANG-BANG TIMING RECOVERY IN A COMMUNICATION SYSTEM

VOLTAGE MARGIN BASED BAUD RATE TIMING RECOVERY IN A COMMUNICATION S...

TAP ADAPTATION WITH A FULLY UNROLLED DECISION FEEDBACK EQUALIZER

Systems and Methods for Synchronous, Retimed Analog to Digital Conv...

Systems and Methods for Synchronous, Retimed Analog to Digital Conv...

DESIGN METHODOLOGY FOR PREVENTING FUNCTIONAL FAILURE CAUSED BY CDM ESD

Circuit Simulation Using Step Response Analysis in the Frequency Do...

SYSTEMS AND METHODS FOR PIPELINED ANALOG TO DIGITAL CONVERSION

Systems and Methods for Speculative Signal Equalization

Electrostatic Discharge Protection Circuit Employing a Micro Electr...

Analog-to-Digital Converter

SEMICONDUCTOR PACKAGE HAVING INCREASED RESISTANCE TO ELECTROSTATIC...

Electrostatic discharge series protection

Semiconductor package having increased resistance to electrostatic...

Electrostatic discharge testing

Circuit protection system

CDM ESD event protection in application circuits

CDM ESD event simulation and remediation thereof in application cir...