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Chris B. Freeman
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Portland, OR, US
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Patents Grants
last 30 patents
Information
Patent Grant
Method and apparatus for providing debug functionality in a buffere...
Patent number
7,412,627
Issue date
Aug 12, 2008
Intel Corporation
Kuljit S. Bains
G11 - INFORMATION STORAGE
Information
Patent Grant
Memory device having error checking and correction
Patent number
7,386,765
Issue date
Jun 10, 2008
Intel Corporation
Robert M. Ellis
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Memory buffer device integrating refresh logic
Patent number
7,353,329
Issue date
Apr 1, 2008
Intel Corporation
Robert M. Ellis
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Buffered memory module with implicit to explicit memory command exp...
Patent number
7,243,205
Issue date
Jul 10, 2007
Intel Corporation
Chris B. Freeman
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method and apparatus for multiple row caches per bank
Patent number
7,050,351
Issue date
May 23, 2006
Intel Corporation
John B. Halbert
G11 - INFORMATION STORAGE
Information
Patent Grant
Method and apparatus for providing debug functionality in a buffere...
Patent number
6,996,749
Issue date
Feb 7, 2006
Intel Coporation
Kuljit S. Bains
G11 - INFORMATION STORAGE
Information
Patent Grant
Method and apparatus for multiple row caches per bank
Patent number
6,990,036
Issue date
Jan 24, 2006
Intel Corporation
John B. Halbert
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Implementing termination with a default signal on a bus line
Patent number
6,738,844
Issue date
May 18, 2004
Intel Corporation
Harry Muljono
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
Information
Patent Application
Method and apparatus for providing debug functionality in a buffere...
Publication number
20050259480
Publication date
Nov 24, 2005
Intel Corporation (a Delaware corporation)
Kuljit S. Bains
G11 - INFORMATION STORAGE
Information
Patent Application
Method and apparatus for multiple row caches per bank
Publication number
20050146974
Publication date
Jul 7, 2005
John B. Halbert
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Method and apparatus for multiple row caches per bank
Publication number
20050146975
Publication date
Jul 7, 2005
John B. Halbert
G11 - INFORMATION STORAGE
Information
Patent Application
Integral memory buffer and serial presence detect capability for fu...
Publication number
20050138267
Publication date
Jun 23, 2005
Kuljit S. Bains
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Buffered memory module with implicit to explicit memory command exp...
Publication number
20050108469
Publication date
May 19, 2005
Intel Corporation
Chris B. Freeman
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Memory buffer device integrating ECC
Publication number
20050081085
Publication date
Apr 14, 2005
Robert M. Ellis
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Memory buffer device integrating refresh
Publication number
20050071543
Publication date
Mar 31, 2005
Robert M. Ellis
G06 - COMPUTING CALCULATING COUNTING