Chris C. Gianos

Person

Sterling, MA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method, apparatus and system for hierarchical network on chip routing
- Patent number 10,911,261
- Issue date Feb 2, 2021
- Intel Corporation
- Robert P. Adler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Cache allocation with code and data prioritization
- Patent number 10,089,229
- Issue date Oct 2, 2018
- Intel Corporation
- Andrew J. Herdrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache allocation with code and data prioritization
- Patent number 9,563,564
- Issue date Feb 7, 2017
- Intel Corporation
- Andrew J. Herdrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-channel fractional clock data transfer
- Patent number 7,958,284
- Issue date Jun 7, 2011
- Intel Corporation
- Subramaniam Maiyuran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and system for response determinism by synchronization
- Patent number 7,804,890
- Issue date Sep 28, 2010
- Intel Corporation
- Muraleedhara H. Navada
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Deterministic operation of an input/output interface
- Patent number 7,568,118
- Issue date Jul 28, 2009
- Intel Corporation
- Warren R. Anderson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Hierarchical ring buffers for buffering data between processor and...
- Patent number 6,112,267
- Issue date Aug 29, 2000
- Digital Equipment Corporation
- Joel James McCormack
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for providing non-blocking pipelined cache
- Patent number 6,085,292
- Issue date Jul 4, 2000
- Digital Equipment Corporation
- Joel J. McCormack
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphic system with read/write overlap detector
- Patent number 5,870,109
- Issue date Feb 9, 1999
- Digital Equipment Corporation
- Joel J. McCormack
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Method for providing improved graphics performance through atypical...
- Patent number 5,781,201
- Issue date Jul 14, 1998
- Digital Equipment Corporation
- Joel J. McCormack
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Method for quickly painting and copying shallow pixels on a deep fr...
- Patent number 5,696,945
- Issue date Dec 9, 1997
- Digital Equipment Corporation
- Larry D. Seiler
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Method for increasing the performance of lines drawn into a framebu...
- Patent number 5,559,953
- Issue date Sep 24, 1996
- Digital Equipment Corporation
- Larry D. Seiler
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD, APPARATUS AND SYSTEM FOR HIERARCHICAL NETWORK ON CHIP ROUTING
- Publication number 20180176118
- Publication date Jun 21, 2018
- Intel Corporation
- Robert P. Adler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CACHE ALLOCATION WITH CODE AND DATA PRIORITIZATION
- Publication number 20170192887
- Publication date Jul 6, 2017
- Intel Corporation
- ANDREW J. HERDRICH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE ALLOCATION WITH CODE AND DATA PRIORITIZATION
- Publication number 20160299849
- Publication date Oct 13, 2016
- Intel Corporation
- ANDREW J. HERDRICH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems, Apparatuses, and Methods for Resource Bandwidth Enforcement
- Publication number 20160284021
- Publication date Sep 29, 2016
- Andrew HERDRICH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-channel fractional clock data transfer
- Publication number 20070201592
- Publication date Aug 30, 2007
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Deterministic operation of an input/output interface
- Publication number 20070067514
- Publication date Mar 22, 2007
- Warren R. Anderson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and system for response determinism by synchronization
- Publication number 20070041405
- Publication date Feb 22, 2007
- Muraleedhara H. Navada
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Store sets poison propagation
- Publication number 20030126409
- Publication date Jul 3, 2003
- Toni Juan
- G06 - COMPUTING CALCULATING COUNTING

Chris C. Gianos

Person

Patents Grantslast 30 patents

Method, apparatus and system for hierarchical network on chip routing

Cache allocation with code and data prioritization

Cache allocation with code and data prioritization

Multi-channel fractional clock data transfer

Method and system for response determinism by synchronization

Deterministic operation of an input/output interface

Hierarchical ring buffers for buffering data between processor and...

Apparatus and method for providing non-blocking pipelined cache

Graphic system with read/write overlap detector

Method for providing improved graphics performance through atypical...

Method for quickly painting and copying shallow pixels on a deep fr...

Method for increasing the performance of lines drawn into a framebu...

Patents Applicationslast 30 patents

METHOD, APPARATUS AND SYSTEM FOR HIERARCHICAL NETWORK ON CHIP ROUTING

CACHE ALLOCATION WITH CODE AND DATA PRIORITIZATION

CACHE ALLOCATION WITH CODE AND DATA PRIORITIZATION

Systems, Apparatuses, and Methods for Resource Bandwidth Enforcement

Multi-channel fractional clock data transfer

Deterministic operation of an input/output interface

Method and system for response determinism by synchronization

Store sets poison propagation