Chris D. Matthews

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Folsom, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for power reduction on a processor bus
- Patent number 7,623,396
- Issue date Nov 24, 2009
- Intel Corporation
- Chunyu Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Duty cycle rejecting serializing multiplexer for output data drivers
- Patent number 7,577,861
- Issue date Aug 18, 2009
- Intel Corporation
- Alexander Levin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronizing and aligning differing clock domains
- Patent number 6,963,991
- Issue date Nov 8, 2005
- Intel Corporation
- Kevin M. Hill
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method and apparatus for power reduction on a processor bus
- Publication number 20080288797
- Publication date Nov 20, 2008
- Chunyu Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL TECHNIQUES FOR BUS INTERFACES
- Publication number 20080162766
- Publication date Jul 3, 2008
- Blaise Fanning
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Duty cycle rejecting 2:1 serializing mux for output data drivers
- Publication number 20070157048
- Publication date Jul 5, 2007
- Intel Corporation
- Alexander Levin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synchronizing and aligning differing clock domains
- Publication number 20030226052
- Publication date Dec 4, 2003
- Kevin M. Hill
- G06 - COMPUTING CALCULATING COUNTING