Chris Michael Brueggen

Person

Dallas, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Mechanism to represent data structures for a datatype engine and pr...
- Patent number 12,056,044
- Issue date Aug 6, 2024
- Hewlett Packard Enterprise Development LP
- Keith D. Underwood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical layer low-latency forward error correction
- Patent number 11,424,859
- Issue date Aug 23, 2022
- Hewlett Packard Enterprise Development LP
- Christopher Michael Brueggen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and system for enhanced queue management in a switch
- Patent number 11,349,771
- Issue date May 31, 2022
- Hewlett Packard Enterprise Development LP
- Gregg B. Lesartre
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Masterless raid for byte-addressable non-volatile memory
- Patent number 10,922,178
- Issue date Feb 16, 2021
- Hewlett Packard Enterprise Development LP
- Gregg B. Lesartre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Re-encoding data associated with failed memory devices
- Patent number 10,735,030
- Issue date Aug 4, 2020
- Hewlett Packard Enterprise Development LP
- Gregg B. Lesartre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction code words with binomial bit error distribution
- Patent number 10,666,294
- Issue date May 26, 2020
- Hewlett Packard Enterprise Development LP
- Chris M. Brueggen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
List decode circuits
- Patent number 10,567,003
- Issue date Feb 18, 2020
- Hewlett Packard Enterprise Development LP
- Chris Michael Brueggen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Preventing data corruption and single point of failure in a fault-t...
- Patent number 10,402,287
- Issue date Sep 3, 2019
- Hewlett Packard Enterprise Development LP
- Derek Alan Sherlock
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
List decode circuits
- Patent number 10,367,529
- Issue date Jul 30, 2019
- Hewlett Packard Enterprise Development LP
- Chris Michael Brueggen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Managing a set of resources
- Patent number 10,338,965
- Issue date Jul 2, 2019
- Hewlett Packard Enterprise Development LP
- Christopher Michael Brueggen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction code in memory
- Patent number 10,312,943
- Issue date Jun 4, 2019
- Hewlett Packard Enterprise Development LP
- Gregg B. Lesartre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detection of error patterns in memory dies
- Patent number 10,275,307
- Issue date Apr 30, 2019
- Hewlett Packard Enterprise Development LP
- Gregg B. Lesartre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing results from list decode methods
- Patent number 10,243,587
- Issue date Mar 26, 2019
- Hewlett Packard Enterprise Developmetn LP
- Chris Michael Brueggen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory controller
- Patent number 10,176,043
- Issue date Jan 8, 2019
- Hewlett Packard Enterprise Development LP
- Gregg B. Lesartre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
List manipulation circuits
- Patent number 10,050,641
- Issue date Aug 14, 2018
- Hewlett Packard Enterprise Development LP
- Chris Michael Brueggen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Paired node controllers
- Patent number 8,521,940
- Issue date Aug 27, 2013
- Hewlett-Packard Development Company, L.P.
- Chris M. Brueggen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Merging subsequent updates to a memory location
- Patent number 8,370,582
- Issue date Feb 5, 2013
- Hewlett-Packard Development Company, L.P.
- Chris Brueggen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rescinding ownership of a cache line in a computer system
- Patent number 8,316,189
- Issue date Nov 20, 2012
- Hewlett-Packard Development Company, L.P.
- Chris Brueggen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Persistent error detection in digital memory
- Patent number 8,205,146
- Issue date Jun 19, 2012
- Hewlett-Packard Development Company, L.P.
- Christopher Michael Brueggen
- G11 - INFORMATION STORAGE
Information Patent Grant
Resource arbitration
- Patent number 8,085,801
- Issue date Dec 27, 2011
- Hewlett-Packard Development Company, L.P.
- Chris Michael Brueggen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Priority selection circuit
- Patent number 7,817,653
- Issue date Oct 19, 2010
- Hewlett-Packard Development Company, L.P.
- Chris Michael Brueggen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for mitigating latency associated with error de...
- Patent number 7,577,890
- Issue date Aug 18, 2009
- Hewlett-Packard Development Company, L.P.
- Michael A. Schroeder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partitioning data for error correction
- Patent number 7,237,176
- Issue date Jun 26, 2007
- Hewlett-Packard Development Company, L.P.
- Theodore Carter Briggs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for processor memory allocation
- Patent number 6,968,440
- Issue date Nov 22, 2005
- Hewlett-Packard Development Company, L.P.
- Christopher M. Brueggen
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MECHANISM TO REPRESENT DATA STRUCTURES FOR A DATATYPE ENGINE AND PR...
- Publication number 20240143494
- Publication date May 2, 2024
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Keith D. Underwood
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHYSICAL LAYER LOW-LATENCY FORWARD ERROR CORRECTION
- Publication number 20220123860
- Publication date Apr 21, 2022
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- CHRISTOPHER MICHAEL BRUEGGEN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND SYSTEM FOR ENHANCED QUEUE MANAGEMENT IN A SWITCH
- Publication number 20210344610
- Publication date Nov 4, 2021
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Gregg B. Lesartre
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DEEP LEARNING ACCELERATOR SYSTEM INTERFACE
- Publication number 20210110243
- Publication date Apr 15, 2021
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- CRAIG WARNER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MASTERLESS RAID FOR BYTE-ADDRESSABLE NON-VOLATILE MEMORY
- Publication number 20200133777
- Publication date Apr 30, 2020
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Gregg B. Lesartre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CORRECTION CODE WORDS WITH BINOMIAL BIT ERROR DISTRIBUTION
- Publication number 20190268018
- Publication date Aug 29, 2019
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Chris M. Brueggen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RE-ENCODING DATA ASSOCIATED WITH FAILED MEMORY DEVICES
- Publication number 20190044546
- Publication date Feb 7, 2019
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Gregg B. Lesartre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CORRECTION CODE IN MEMORY
- Publication number 20180276068
- Publication date Sep 27, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Gregg B. Lesartre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETECTION OF ERROR PATTERNS IN MEMORY DIES
- Publication number 20180260273
- Publication date Sep 13, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Gregg B. Lesartre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING RESULTS FROM LIST DECODE METHODS
- Publication number 20180226994
- Publication date Aug 9, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Chris Michael Brueggen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LIST DECODE CIRCUITS
- Publication number 20180219560
- Publication date Aug 2, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Chris Michael Brueggen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LIST DECODE CIRCUITS
- Publication number 20180212625
- Publication date Jul 26, 2018
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Chris Michael Brueggen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PREVENTING DATA CORRUPTION AND SINGLE POINT OF FAILURE IN A FAULT-T...
- Publication number 20170249223
- Publication date Aug 31, 2017
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Derek Alan SHERLOCK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER
- Publication number 20170199785
- Publication date Jul 13, 2017
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Gregg B. Lesartre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING A SET OF RESOURCES
- Publication number 20130263148
- Publication date Oct 3, 2013
- Christopher Michael Brueggen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Merging Subsequent Updates To A Memory Location
- Publication number 20110185104
- Publication date Jul 28, 2011
- Chris Brueggen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RESCINDING OWNERSHIP OF A CACHE LINE IN A COMPUTER SYSTEM
- Publication number 20110138132
- Publication date Jun 9, 2011
- Chris Brueggen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PAIRED NODE CONTROLLERS
- Publication number 20110096786
- Publication date Apr 28, 2011
- Chris M. BRUEGGEN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RESOURCE ARBITRATION
- Publication number 20110032947
- Publication date Feb 10, 2011
- Chris Michael Brueggen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System and Method for Achieving Cache Coherency Within Multiprocess...
- Publication number 20080270708
- Publication date Oct 30, 2008
- Craig Warner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Priority Selection Circuit
- Publication number 20080263239
- Publication date Oct 23, 2008
- Hewlett-Packard Development Company, L.P.
- Chris Michael Brueggen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Persistent error detection in digital memory
- Publication number 20070033488
- Publication date Feb 8, 2007
- Christopher Michael Brueggen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and methods for mitigating latency associated with error de...
- Publication number 20060168503
- Publication date Jul 27, 2006
- Michael A. Schroeder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Partitioning data for error correction
- Publication number 20050160329
- Publication date Jul 21, 2005
- Theodore Carter Briggs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and methods for processor memory allocation
- Publication number 20040225858
- Publication date Nov 11, 2004
- Christopher M. Brueggen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and methods for processing an error correction code word fo...
- Publication number 20040225944
- Publication date Nov 11, 2004
- Christopher M. Brueggen
- G06 - COMPUTING CALCULATING COUNTING

Chris Michael Brueggen

Person

Patents Grantslast 30 patents

Mechanism to represent data structures for a datatype engine and pr...

Physical layer low-latency forward error correction

Method and system for enhanced queue management in a switch

Masterless raid for byte-addressable non-volatile memory

Re-encoding data associated with failed memory devices

Error correction code words with binomial bit error distribution

List decode circuits

Preventing data corruption and single point of failure in a fault-t...

List decode circuits

Managing a set of resources

Error correction code in memory

Detection of error patterns in memory dies

Managing results from list decode methods

Memory controller

List manipulation circuits

Paired node controllers

Merging subsequent updates to a memory location

Rescinding ownership of a cache line in a computer system

Persistent error detection in digital memory

Resource arbitration

Priority selection circuit

Systems and methods for mitigating latency associated with error de...

Partitioning data for error correction

Systems and methods for processor memory allocation

Patents Applicationslast 30 patents

MECHANISM TO REPRESENT DATA STRUCTURES FOR A DATATYPE ENGINE AND PR...

PHYSICAL LAYER LOW-LATENCY FORWARD ERROR CORRECTION

METHOD AND SYSTEM FOR ENHANCED QUEUE MANAGEMENT IN A SWITCH

DEEP LEARNING ACCELERATOR SYSTEM INTERFACE

MASTERLESS RAID FOR BYTE-ADDRESSABLE NON-VOLATILE MEMORY

ERROR CORRECTION CODE WORDS WITH BINOMIAL BIT ERROR DISTRIBUTION

RE-ENCODING DATA ASSOCIATED WITH FAILED MEMORY DEVICES

ERROR CORRECTION CODE IN MEMORY

DETECTION OF ERROR PATTERNS IN MEMORY DIES

MANAGING RESULTS FROM LIST DECODE METHODS

LIST DECODE CIRCUITS

LIST DECODE CIRCUITS

PREVENTING DATA CORRUPTION AND SINGLE POINT OF FAILURE IN A FAULT-T...

MEMORY CONTROLLER

MANAGING A SET OF RESOURCES

Merging Subsequent Updates To A Memory Location

RESCINDING OWNERSHIP OF A CACHE LINE IN A COMPUTER SYSTEM

PAIRED NODE CONTROLLERS

RESOURCE ARBITRATION

System and Method for Achieving Cache Coherency Within Multiprocess...

Priority Selection Circuit

Persistent error detection in digital memory

Systems and methods for mitigating latency associated with error de...

Partitioning data for error correction

Systems and methods for processor memory allocation

Systems and methods for processing an error correction code word fo...