Christopher Edward Koob

Person

Round Rock, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory transaction management
- Patent number 12,175,280
- Issue date Dec 24, 2024
- QUALCOMM Incorporated
- Christopher Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of VLIW instruction processing using reduced-widt...
- Patent number 11,663,011
- Issue date May 30, 2023
- QUALCOMM Incorporated
- Peter Sassone
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of VLIW instruction processing using reduced-widt...
- Patent number 10,719,325
- Issue date Jul 21, 2020
- QUALCOMM Incorporated
- Peter Sassone
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Priority-based storage and access of compressed memory lines in mem...
- Patent number 10,482,021
- Issue date Nov 19, 2019
- QUALCOMM Incorporated
- Andres Alejandro Oportus Valenzuela
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing bandwidth consumption when performing free memory list cac...
- Patent number 10,198,362
- Issue date Feb 5, 2019
- QUALCOMM Incorporated
- Richard Senior
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing metadata size in compressed memory systems of processor-ba...
- Patent number 10,169,246
- Issue date Jan 1, 2019
- QUALCOMM Incorporated
- Richard Senior
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Externally programmable memory management unit
- Patent number 10,114,756
- Issue date Oct 30, 2018
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bandwidth/resource management for multithreaded processors
- Patent number 10,102,031
- Issue date Oct 16, 2018
- QUALCOMM Incorporated
- Serag Monier Gadelrab
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing or avoiding buffering of evicted cache data from an uncomp...
- Patent number 10,061,698
- Issue date Aug 28, 2018
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid write-through/write-back cache policy managers, and related...
- Patent number 10,025,711
- Issue date Jul 17, 2018
- QUALCOMM Incorporated
- Peter G. Sassone
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective translation lookaside buffer search and page fault
- Patent number 9,858,201
- Issue date Jan 2, 2018
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Per thread cacheline allocation mechanism in shared partitioned cac...
- Patent number 9,824,013
- Issue date Nov 21, 2017
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Independent power collapse methodology
- Patent number 9,785,211
- Issue date Oct 10, 2017
- QUALCOMM Incorporated
- Christopher Edward Koob
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Write-only dataless state for maintaining cache coherency
- Patent number 9,767,025
- Issue date Sep 19, 2017
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coprocessor for out-of-order loads
- Patent number 9,678,758
- Issue date Jun 13, 2017
- QUALCOMM Incorporated
- Lucian Codrescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive mode translation lookaside buffer search and access fault
- Patent number 9,658,793
- Issue date May 23, 2017
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods of executing multiple hypervisors using multipl...
- Patent number 9,606,818
- Issue date Mar 28, 2017
- QUALCOMM Incorporated
- Erich James Plondke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method to reset a lock indication
- Patent number 9,501,332
- Issue date Nov 22, 2016
- QUALCOMM Incorporated
- Dana M. Vantrease
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory management unit directed access to system interfaces
- Patent number 9,239,799
- Issue date Jan 19, 2016
- QUALCOMM Incorporated
- Ajay Anant Ingle
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Dual-voltage domain memory buffers, and related systems and methods
- Patent number 9,142,268
- Issue date Sep 22, 2015
- QUALCOMM Incorporated
- Jentsung Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Data storage for voltage domain crossings
- Patent number 8,995,207
- Issue date Mar 31, 2015
- QUALCOMM Incorporated
- Christopher Edward Koob
- G11 - INFORMATION STORAGE
Information Patent Grant
Configurable cache and method to configure same
- Patent number 8,943,293
- Issue date Jan 27, 2015
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable cache and method to configure same
- Patent number 8,719,503
- Issue date May 6, 2014
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system with processor local coherency for virtualized inpu...
- Patent number 8,656,137
- Issue date Feb 18, 2014
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method to access a portion of a level two memory and a l...
- Patent number 8,341,353
- Issue date Dec 25, 2012
- QUALCOMM Incorporated
- Suresh K. Venkumahanti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable cache and method to configure same
- Patent number 8,266,409
- Issue date Sep 11, 2012
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective preclusion of a bus access request
- Patent number 8,260,990
- Issue date Sep 4, 2012
- QUALCOMM Incorporated
- Lucian Codrescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of performing two's complement operations in a di...
- Patent number 8,234,319
- Issue date Jul 31, 2012
- QUALCOMM Incorporated
- Shankar Krithivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Booth multiplier with enhanced reduction tree circuitry
- Patent number 7,809,783
- Issue date Oct 5, 2010
- QUALCOMM Incorporated
- Shankar Krithivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two dimensional timeout table mechanism with optimized delay charac...
- Patent number 7,801,164
- Issue date Sep 21, 2010
- Agere Systems Inc.
- Christopher Koob
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
POWER NEURAL NETWORK-BASED WORKLOAD DISTRIBUTION IN DISTRIBUTED COM...
- Publication number 20240419963
- Publication date Dec 19, 2024
- QUALCOMM Incorporated
- Mustafa KESKIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY TRANSACTION MANAGEMENT
- Publication number 20230126322
- Publication date Apr 27, 2023
- QUALCOMM Incorporated
- Christopher Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ OPTIONAL AND WRITE OPTIONAL COMMANDS
- Publication number 20220113901
- Publication date Apr 14, 2022
- QUALCOMM Incorporated
- Andrew Edmund TURNER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD OF VLIW INSTRUCTION PROCESSING USING REDUCED-WIDT...
- Publication number 20200364051
- Publication date Nov 19, 2020
- Qualcomm Incorporated
- Peter SASSONE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR INTELLIGENT TILE-BASED MEMORY BANDWIDTH MANAG...
- Publication number 20200250101
- Publication date Aug 6, 2020
- QUALCOMM Incorporated
- GEORGE PATSILARAS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD OF VLIW INSTRUCTION PROCESSING USING REDUCED-WIDT...
- Publication number 20190138311
- Publication date May 9, 2019
- QUALCOMM Incorporated
- Peter SASSONE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING METADATA SIZE IN COMPRESSED MEMORY SYSTEMS OF PROCESSOR-BA...
- Publication number 20180329830
- Publication date Nov 15, 2018
- QUALCOMM Incorporated
- Richard Senior
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING BANDWIDTH CONSUMPTION WHEN PERFORMING FREE MEMORY LIST CAC...
- Publication number 20180225224
- Publication date Aug 9, 2018
- QUALCOMM Incorporated
- Richard Senior
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING OR AVOIDING BUFFERING OF EVICTED CACHE DATA FROM AN UNCOMP...
- Publication number 20180217930
- Publication date Aug 2, 2018
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING OR AVOIDING BUFFERING OF EVICTED CACHE DATA FROM AN UNCOMP...
- Publication number 20180173623
- Publication date Jun 21, 2018
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRIORITY-BASED STORAGE AND ACCESS OF COMPRESSED MEMORY LINES IN MEM...
- Publication number 20170371792
- Publication date Dec 28, 2017
- QUALCOMM Incorporated
- Andres Alejandro OPORTUS VALENZUELA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BANDWIDTH/RESOURCE MANAGEMENT FOR MULTITHREADED PROCESSORS
- Publication number 20160350152
- Publication date Dec 1, 2016
- QUALCOMM Incorporated
- Serag Monier GADELRAB
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE TRANSLATION LOOKASIDE BUFFER SEARCH AND PAGE FAULT
- Publication number 20160246731
- Publication date Aug 25, 2016
- QUALCOMM Incorporated
- Christopher Edward KOOB
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE MODE TRANSLATION LOOKASIDE BUFFER SEARCH AND ACCESS FAULT
- Publication number 20160246534
- Publication date Aug 25, 2016
- QUALCOMM Incorporated
- Christopher Edward KOOB
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Independent power collapse methodology
- Publication number 20160239060
- Publication date Aug 18, 2016
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COPROCESSOR FOR OUT-OF-ORDER LOADS
- Publication number 20160092238
- Publication date Mar 31, 2016
- QUALCOMM Incorporated
- Lucian CODRESCU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTERNALLY PROGRAMMABLE MEMORY MANAGEMENT UNIT
- Publication number 20140281332
- Publication date Sep 18, 2014
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS OF EXECUTING MULTIPLE HYPERVISORS
- Publication number 20140282508
- Publication date Sep 18, 2014
- QUALCOMM Incorporated
- Erich James Plondke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE CACHE AND METHOD TO CONFIGURE SAME
- Publication number 20140208027
- Publication date Jul 24, 2014
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD TO RESET A LOCK INDICATION
- Publication number 20140181341
- Publication date Jun 26, 2014
- QUALCOMM Incorporated
- Dana M. Vantrease
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Per Thread Cacheline Allocation Mechanism in Shared Partitioned Cac...
- Publication number 20130304994
- Publication date Nov 14, 2013
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Write-Only Dataless State for Maintaining Cache Coherency
- Publication number 20130282987
- Publication date Oct 24, 2013
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hybrid Write-Through/Write-Back Cache Policy Managers, and Related...
- Publication number 20130185511
- Publication date Jul 18, 2013
- QUALCOMM Incorporated
- Peter G. Sassone
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUAL-VOLTAGE DOMAIN MEMORY BUFFERS, AND RELATED SYSTEMS AND METHODS
- Publication number 20130182515
- Publication date Jul 18, 2013
- QUALCOMM Incorporated
- Jentsung Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computer System with Processor Local Coherency for Virtualized Inpu...
- Publication number 20130061020
- Publication date Mar 7, 2013
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data Storage for Voltage Domain Crossings
- Publication number 20130039133
- Publication date Feb 14, 2013
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable Cache and Method to Configure Same
- Publication number 20120265943
- Publication date Oct 18, 2012
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method to Access a Portion of a Level Two Memory and a L...
- Publication number 20110173391
- Publication date Jul 14, 2011
- QUALCOMM Incorporated
- Suresh K. Venkumahanti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dedicated Arithmetic Decoding Instruction
- Publication number 20110125987
- Publication date May 26, 2011
- QUALCOMM Incorporated
- Erich James Plondke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable Cache and Method to Configure Same
- Publication number 20100228941
- Publication date Sep 9, 2010
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING

Christopher Edward Koob

Person

Patents Grantslast 30 patents

Memory transaction management

System and method of VLIW instruction processing using reduced-widt...

System and method of VLIW instruction processing using reduced-widt...

Priority-based storage and access of compressed memory lines in mem...

Reducing bandwidth consumption when performing free memory list cac...

Reducing metadata size in compressed memory systems of processor-ba...

Externally programmable memory management unit

Bandwidth/resource management for multithreaded processors

Reducing or avoiding buffering of evicted cache data from an uncomp...

Hybrid write-through/write-back cache policy managers, and related...

Selective translation lookaside buffer search and page fault

Per thread cacheline allocation mechanism in shared partitioned cac...

Independent power collapse methodology

Write-only dataless state for maintaining cache coherency

Coprocessor for out-of-order loads

Adaptive mode translation lookaside buffer search and access fault

Systems and methods of executing multiple hypervisors using multipl...

System and method to reset a lock indication

Memory management unit directed access to system interfaces

Dual-voltage domain memory buffers, and related systems and methods

Data storage for voltage domain crossings

Configurable cache and method to configure same

Configurable cache and method to configure same

Computer system with processor local coherency for virtualized inpu...

System and method to access a portion of a level two memory and a l...

Configurable cache and method to configure same

Selective preclusion of a bus access request

System and method of performing two's complement operations in a di...

Booth multiplier with enhanced reduction tree circuitry

Two dimensional timeout table mechanism with optimized delay charac...

Patents Applicationslast 30 patents

POWER NEURAL NETWORK-BASED WORKLOAD DISTRIBUTION IN DISTRIBUTED COM...

MEMORY TRANSACTION MANAGEMENT

READ OPTIONAL AND WRITE OPTIONAL COMMANDS

SYSTEM AND METHOD OF VLIW INSTRUCTION PROCESSING USING REDUCED-WIDT...

SYSTEM AND METHOD FOR INTELLIGENT TILE-BASED MEMORY BANDWIDTH MANAG...

SYSTEM AND METHOD OF VLIW INSTRUCTION PROCESSING USING REDUCED-WIDT...

REDUCING METADATA SIZE IN COMPRESSED MEMORY SYSTEMS OF PROCESSOR-BA...

REDUCING BANDWIDTH CONSUMPTION WHEN PERFORMING FREE MEMORY LIST CAC...

REDUCING OR AVOIDING BUFFERING OF EVICTED CACHE DATA FROM AN UNCOMP...

REDUCING OR AVOIDING BUFFERING OF EVICTED CACHE DATA FROM AN UNCOMP...

PRIORITY-BASED STORAGE AND ACCESS OF COMPRESSED MEMORY LINES IN MEM...

BANDWIDTH/RESOURCE MANAGEMENT FOR MULTITHREADED PROCESSORS

SELECTIVE TRANSLATION LOOKASIDE BUFFER SEARCH AND PAGE FAULT

ADAPTIVE MODE TRANSLATION LOOKASIDE BUFFER SEARCH AND ACCESS FAULT

Independent power collapse methodology

COPROCESSOR FOR OUT-OF-ORDER LOADS

EXTERNALLY PROGRAMMABLE MEMORY MANAGEMENT UNIT

SYSTEMS AND METHODS OF EXECUTING MULTIPLE HYPERVISORS

CONFIGURABLE CACHE AND METHOD TO CONFIGURE SAME

SYSTEM AND METHOD TO RESET A LOCK INDICATION

Per Thread Cacheline Allocation Mechanism in Shared Partitioned Cac...

Write-Only Dataless State for Maintaining Cache Coherency

Hybrid Write-Through/Write-Back Cache Policy Managers, and Related...

DUAL-VOLTAGE DOMAIN MEMORY BUFFERS, AND RELATED SYSTEMS AND METHODS

Computer System with Processor Local Coherency for Virtualized Inpu...

Data Storage for Voltage Domain Crossings

Configurable Cache and Method to Configure Same

System and Method to Access a Portion of a Level Two Memory and a L...

Dedicated Arithmetic Decoding Instruction

Configurable Cache and Method to Configure Same