Christopher G. Wieduwilt

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatuses and methods for controlling sense amplifier operation
- Patent number 12,217,788
- Issue date Feb 4, 2025
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay of initialization at memory die
- Patent number 12,131,040
- Issue date Oct 29, 2024
- Micron Technology, Inc.
- James S. Rehmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses, systems, and methods for error correction
- Patent number 12,079,076
- Issue date Sep 3, 2024
- Yoshinori Fujiwara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory placement in a computing system
- Patent number 12,073,108
- Issue date Aug 27, 2024
- Micron Technology, Inc.
- James S. Rehmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delay elements for command timing in a memory device
- Patent number 12,001,356
- Issue date Jun 4, 2024
- Micron Technology, Inc.
- James S. Rehmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shared components in fuse match logic
- Patent number 11,954,338
- Issue date Apr 9, 2024
- Micron Technology, Inc.
- James S. Rehmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fuse delay of a command in a memory package
- Patent number 11,948,660
- Issue date Apr 2, 2024
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier layout designs and related apparatuses and methods
- Patent number 11,948,657
- Issue date Apr 2, 2024
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Indicating a blocked repair operation
- Patent number 11,948,655
- Issue date Apr 2, 2024
- Micron Technology, Inc.
- Seth A. Eichmeyer
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods for optimizing semiconductor device placement on a substrat...
- Patent number 11,929,139
- Issue date Mar 12, 2024
- Micron Technology, Inc.
- James S. Rehmeyer
- G11 - INFORMATION STORAGE
Information Patent Grant
Transistor antifuse, and related devices, systems, and methods
- Patent number 11,930,636
- Issue date Mar 12, 2024
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Grant
Staggering refresh address counters of a number of memory devices,...
- Patent number 11,887,649
- Issue date Jan 30, 2024
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated assemblies and semiconductor memory devices
- Patent number 11,877,445
- Issue date Jan 16, 2024
- Micron Technology, Inc.
- Sangmin Hwang
- G11 - INFORMATION STORAGE
Information Patent Grant
Selectable fuse sets, and related methods, devices, and systems
- Patent number 11,869,620
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Grant
Management of heat on a semiconductor device and methods for produc...
- Patent number 11,869,826
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- James S. Rehmeyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Error evaluation for a memory system
- Patent number 11,829,243
- Issue date Nov 28, 2023
- Micron Technology, Inc.
- Matthew D. Jenkinson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device with a memory repair mechanism and methods for operat...
- Patent number 11,694,762
- Issue date Jul 4, 2023
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Grant
Modifying subsets of memory bank operating parameters
- Patent number 11,669,447
- Issue date Jun 6, 2023
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for fuse error detection
- Patent number 11,645,134
- Issue date May 9, 2023
- Micron Technology, Inc.
- Daniel S. Miller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modifying memory bank operating parameters
- Patent number 11,557,367
- Issue date Jan 17, 2023
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Grant
Adjustable column address scramble using fuses
- Patent number 11,488,685
- Issue date Nov 1, 2022
- Micron Technology, Inc.
- James S. Rehmeyer
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic trim selection based on operating voltage levels for semico...
- Patent number 11,450,388
- Issue date Sep 20, 2022
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for counting fail bit and reading out the same
- Patent number 11,437,116
- Issue date Sep 6, 2022
- Micron Technology, Inc.
- Christian N. Mohr
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses, systems, and methods for error correction
- Patent number 11,263,078
- Issue date Mar 1, 2022
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selectable fuse sets, and related methods, devices, and systems
- Patent number 11,244,741
- Issue date Feb 8, 2022
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with a repair match mechanism and methods for operati...
- Patent number 11,232,849
- Issue date Jan 25, 2022
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Grant
Staggered refresh counters for a memory device
- Patent number 11,217,296
- Issue date Jan 4, 2022
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timing based arbitration methods and apparatuses for calibrating im...
- Patent number 11,212,142
- Issue date Dec 28, 2021
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Grant
Modifying subsets of memory bank operating parameters
- Patent number 11,138,107
- Issue date Oct 5, 2021
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device with a memory repair mechanism and methods for operat...
- Patent number 11,139,045
- Issue date Oct 5, 2021
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
DELAY OF INITIALIZATION AT MEMORY DIE
- Publication number 20250044965
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- James S. Rehmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR ERROR CORRECTION
- Publication number 20250021435
- Publication date Jan 16, 2025
- Lodestar Licensing Group LLC
- Yoshinori Fujiwara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DELAY ELEMENTS FOR COMMAND TIMING IN A MEMORY DEVICE
- Publication number 20240320169
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- James S. Rehmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FUSE DELAY OF A COMMAND IN A MEMORY PACKAGE
- Publication number 20240233791
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Application
DEVICES AND METHODS FOR A FINFET SENSE AMPLIFIER
- Publication number 20240203462
- Publication date Jun 20, 2024
- Micron Technology, Inc.
- Wenjun Li
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS FOR OPTIMIZING SEMICONDUCTOR DEVICE PLACEMENT ON A SUBSTRAT...
- Publication number 20240177743
- Publication date May 30, 2024
- Micron Technology, Inc.
- James S. Rehmeyer
- G11 - INFORMATION STORAGE
Information Patent Application
STAGGERING REFRESH ADDRESS COUNTERS OF A NUMBER OF MEMORY DEVICES,...
- Publication number 20240161805
- Publication date May 16, 2024
- Lodester Licensing Group LLC
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGEMENT OF HEAT ON A SEMICONDUCTOR DEVICE AND METHODS FOR PRODUC...
- Publication number 20240145341
- Publication date May 2, 2024
- Micron Technology, Inc.
- James S. Rehmeyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ANTIFUSE DEVICE HAVING INTERCONNECT JUMPER
- Publication number 20240128189
- Publication date Apr 18, 2024
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GLOBAL COLUMN REPAIR WITH LOCAL COLUMN DECODER CIRCUITRY, AND RELAT...
- Publication number 20240111628
- Publication date Apr 4, 2024
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated Assemblies and Semiconductor Memory Devices
- Publication number 20240114680
- Publication date Apr 4, 2024
- Micron Technology, Inc.
- Sangmin Hwang
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR CONTROLLING SENSE AMPLIFIER OPERATION
- Publication number 20230410885
- Publication date Dec 21, 2023
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Application
INDICATING A BLOCKED REPAIR OPERATION
- Publication number 20230343409
- Publication date Oct 26, 2023
- Micron Technology, Inc.
- Seth A. Eichmeyer
- G11 - INFORMATION STORAGE
Information Patent Application
UNUSED REDUNDANT ENABLE DISTURB PROTECTION CIRCUIT
- Publication number 20230315918
- Publication date Oct 5, 2023
- Micron Technology, Inc.
- Seth A. Eichmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR EVALUATION FOR A MEMORY SYSTEM
- Publication number 20230222032
- Publication date Jul 13, 2023
- Micron Technology, Inc.
- Matthew D. Jenkinson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SENSE AMPLIFIER LAYOUT DESIGNS AND RELATED APPARATUSES AND METHODS
- Publication number 20230186956
- Publication date Jun 15, 2023
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARED COMPONENTS IN FUSE MATCH LOGIC
- Publication number 20230176754
- Publication date Jun 8, 2023
- Micron Technology, Inc.
- James S. Rehmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DELAY OF INITIALIZATION AT MEMORY DIE
- Publication number 20230128914
- Publication date Apr 27, 2023
- Micron Technology, Inc.
- James S. Rehmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSISTOR ANITFUSE, AND RELATED DEVICES, SYSTEMS, AND METHODS
- Publication number 20230074975
- Publication date Mar 9, 2023
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Application
DELAY ELEMENTS FOR COMMAND TIMING IN A MEMORY DEVICE
- Publication number 20230069576
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- James S. Rehmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS FOR OPTIMIZING SEMICONDUCTOR DEVICE PLACEMENT ON A SUBSTRAT...
- Publication number 20230068666
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- James S. Rehmeyer
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY PLACEMENT IN A COMPUTING SYSTEM
- Publication number 20230066587
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- James S. Rehmeyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FUSE DELAY OF A COMMAND IN A MEMORY PACKAGE
- Publication number 20230026202
- Publication date Jan 26, 2023
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC TRIM SELECTION BASED ON OPERATING VOLTAGE LEVELS FOR SEMICO...
- Publication number 20220238166
- Publication date Jul 28, 2022
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Assemblies and Semiconductor Memory Devices
- Publication number 20220231029
- Publication date Jul 21, 2022
- Micron Technology, Inc.
- Sangmin Hwang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR ERROR CORRECTION
- Publication number 20220156148
- Publication date May 19, 2022
- Micron Technology, Inc.
- Yoshinori Fujiwara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTABLE FUSE SETS, AND RELATED METHODS, DEVICES, AND SYSTEMS
- Publication number 20220139492
- Publication date May 5, 2022
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGEMENT OF HEAT ON A SEMICONDUCTOR DEVICE AND METHODS FOR PRODUC...
- Publication number 20220093488
- Publication date Mar 24, 2022
- Micron Technology, Inc.
- James S. Rehmeyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STAGGERING REFRESH ADDRESS COUNTERS OF A NUMBER OF MEMORY DEVICES,...
- Publication number 20220044720
- Publication date Feb 10, 2022
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH A MEMORY REPAIR MECHANISM AND METHODS FOR OPERAT...
- Publication number 20210398603
- Publication date Dec 23, 2021
- Micron Technology, Inc.
- Christopher G. Wieduwilt
- G11 - INFORMATION STORAGE

Christopher G. Wieduwilt

Person

Patents Grantslast 30 patents

Apparatuses and methods for controlling sense amplifier operation

Delay of initialization at memory die

Apparatuses, systems, and methods for error correction

Memory placement in a computing system

Delay elements for command timing in a memory device

Shared components in fuse match logic

Fuse delay of a command in a memory package

Sense amplifier layout designs and related apparatuses and methods

Indicating a blocked repair operation

Methods for optimizing semiconductor device placement on a substrat...

Transistor antifuse, and related devices, systems, and methods

Staggering refresh address counters of a number of memory devices,...

Integrated assemblies and semiconductor memory devices

Selectable fuse sets, and related methods, devices, and systems

Management of heat on a semiconductor device and methods for produc...

Error evaluation for a memory system

Memory device with a memory repair mechanism and methods for operat...

Modifying subsets of memory bank operating parameters

Apparatuses and methods for fuse error detection

Modifying memory bank operating parameters

Adjustable column address scramble using fuses

Dynamic trim selection based on operating voltage levels for semico...

System and method for counting fail bit and reading out the same

Apparatuses, systems, and methods for error correction

Selectable fuse sets, and related methods, devices, and systems

Memory device with a repair match mechanism and methods for operati...

Staggered refresh counters for a memory device

Timing based arbitration methods and apparatuses for calibrating im...

Modifying subsets of memory bank operating parameters

Memory device with a memory repair mechanism and methods for operat...

Patents Applicationslast 30 patents

DELAY OF INITIALIZATION AT MEMORY DIE

APPARATUSES, SYSTEMS, AND METHODS FOR ERROR CORRECTION

DELAY ELEMENTS FOR COMMAND TIMING IN A MEMORY DEVICE

FUSE DELAY OF A COMMAND IN A MEMORY PACKAGE

DEVICES AND METHODS FOR A FINFET SENSE AMPLIFIER

METHODS FOR OPTIMIZING SEMICONDUCTOR DEVICE PLACEMENT ON A SUBSTRAT...

STAGGERING REFRESH ADDRESS COUNTERS OF A NUMBER OF MEMORY DEVICES,...

MANAGEMENT OF HEAT ON A SEMICONDUCTOR DEVICE AND METHODS FOR PRODUC...

ANTIFUSE DEVICE HAVING INTERCONNECT JUMPER

GLOBAL COLUMN REPAIR WITH LOCAL COLUMN DECODER CIRCUITRY, AND RELAT...

Integrated Assemblies and Semiconductor Memory Devices

APPARATUSES AND METHODS FOR CONTROLLING SENSE AMPLIFIER OPERATION

INDICATING A BLOCKED REPAIR OPERATION

UNUSED REDUNDANT ENABLE DISTURB PROTECTION CIRCUIT

ERROR EVALUATION FOR A MEMORY SYSTEM

SENSE AMPLIFIER LAYOUT DESIGNS AND RELATED APPARATUSES AND METHODS

SHARED COMPONENTS IN FUSE MATCH LOGIC

DELAY OF INITIALIZATION AT MEMORY DIE

TRANSISTOR ANITFUSE, AND RELATED DEVICES, SYSTEMS, AND METHODS

DELAY ELEMENTS FOR COMMAND TIMING IN A MEMORY DEVICE

METHODS FOR OPTIMIZING SEMICONDUCTOR DEVICE PLACEMENT ON A SUBSTRAT...

MEMORY PLACEMENT IN A COMPUTING SYSTEM

FUSE DELAY OF A COMMAND IN A MEMORY PACKAGE

DYNAMIC TRIM SELECTION BASED ON OPERATING VOLTAGE LEVELS FOR SEMICO...

Integrated Assemblies and Semiconductor Memory Devices

APPARATUSES, SYSTEMS, AND METHODS FOR ERROR CORRECTION

SELECTABLE FUSE SETS, AND RELATED METHODS, DEVICES, AND SYSTEMS

MANAGEMENT OF HEAT ON A SEMICONDUCTOR DEVICE AND METHODS FOR PRODUC...

STAGGERING REFRESH ADDRESS COUNTERS OF A NUMBER OF MEMORY DEVICES,...

MEMORY DEVICE WITH A MEMORY REPAIR MECHANISM AND METHODS FOR OPERAT...