Christopher Michael Herring

Person

Essex Junction, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for virtualizing the configuration space of PCI d...
- Patent number 6,629,157
- Issue date Sep 30, 2003
- National Semiconductor Corporation
- Brian D. Falardeau
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system buffers for providing concurrency and avoid deadloc...
- Patent number 5,983,025
- Issue date Nov 9, 1999
- International Business Machines Corporation
- John Edward Derrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system buffers for providing concurrency between CPU acces...
- Patent number 5,906,659
- Issue date May 25, 1999
- International Business Machines Corporation
- John Edward Derrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for decreasing the access time to non-cacheabl...
- Patent number 5,890,216
- Issue date Mar 30, 1999
- International Business Machines Corporation
- John E. Derrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system for detecting and accessing BIOS ROM on the local o...
- Patent number 5,884,094
- Issue date Mar 16, 1999
- International Business Machines Corporation
- Ralph Murray Begun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semaphore access control buffer and method for accelerated semaphor...
- Patent number 5,872,980
- Issue date Feb 16, 1999
- International Business Machines Corporation
- John E. Derrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interfacing an L2 cache to a single bus having alternative protocols
- Patent number 5,860,081
- Issue date Jan 12, 1999
- National Semiconductor Corporation
- Christopher M. Herring
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system for detecting and accessing BIOS ROM on local bus p...
- Patent number 5,802,393
- Issue date Sep 1, 1998
- International Business Machines Corporation
- Ralph Murray Begun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus protocol for locked cycle cache hit
- Patent number 5,787,486
- Issue date Jul 28, 1998
- International Business Machines Corporation
- Henry Chin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache bus snoop protocol for optimized multiprocessor computer system
- Patent number 5,704,058
- Issue date Dec 30, 1997
- John E. Derrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system and method of operation thereof wherein a BIOS ROM...
- Patent number 5,680,556
- Issue date Oct 21, 1997
- International Business Machines Corporation
- Ralph Murray Begun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for merging data during cache checking and writ...
- Patent number 5,627,993
- Issue date May 6, 1997
- International Business Machines Corporation
- Richard P. Abato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and system for merging data during cache checking and write...
- Patent number 5,553,265
- Issue date Sep 3, 1996
- International Business Machines Corporation
- Richard P. Abato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory card, computer system and method of operation for differenti...
- Patent number 5,488,691
- Issue date Jan 30, 1996
- International Business Machines Corporation
- Daniel P. Fuoco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for combining data from multiple CPU write requests via buff...
- Patent number 5,459,842
- Issue date Oct 17, 1995
- International Business Machines Corporation
- Ralph M. Begun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correction code on add-on cards for writing portions of data...
- Patent number 5,452,429
- Issue date Sep 19, 1995
- International Business Machines Corporation
- Daniel P. Fuoco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for reducing an amount of power utilized by selec...
- Patent number 5,404,543
- Issue date Apr 4, 1995
- International Business Machines Corporation
- Marc R. Faucher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selectable interface between memory controller and memory simms
- Patent number 5,375,084
- Issue date Dec 20, 1994
- International Business Machines Corporation
- Ralph M. Begun
- G06 - COMPUTING CALCULATING COUNTING

Christopher Michael Herring

Person

Patents Grantslast 30 patents

System and method for virtualizing the configuration space of PCI d...

Computer system buffers for providing concurrency and avoid deadloc...

Computer system buffers for providing concurrency between CPU acces...

Apparatus and method for decreasing the access time to non-cacheabl...

Computer system for detecting and accessing BIOS ROM on the local o...

Semaphore access control buffer and method for accelerated semaphor...

Interfacing an L2 cache to a single bus having alternative protocols

Computer system for detecting and accessing BIOS ROM on local bus p...

Bus protocol for locked cycle cache hit

Cache bus snoop protocol for optimized multiprocessor computer system

Computer system and method of operation thereof wherein a BIOS ROM...

Methods and systems for merging data during cache checking and writ...

Methods and system for merging data during cache checking and write...

Memory card, computer system and method of operation for differenti...

System for combining data from multiple CPU write requests via buff...

Error correction code on add-on cards for writing portions of data...

Method and system for reducing an amount of power utilized by selec...

Selectable interface between memory controller and memory simms