Chrystelle Lagahe

Person

St. Joseph De Riviere, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Process of treating defects during the bonding of wafers
- Patent number 8,722,515
- Issue date May 13, 2014
- Soitec
- Chrystelle Lagahe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of treating defects during the bonding of wafers
- Patent number 8,530,334
- Issue date Sep 10, 2013
- Soitec
- Chrystelle Lagahe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for production of a very thin layer with thinning by means o...
- Patent number 7,776,714
- Issue date Aug 17, 2010
- Commissariat a l'Energie Atomique
- Hubert Moriceau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embrittled substrate and method for making same
- Patent number 7,498,245
- Issue date Mar 3, 2009
- Commissariat a l'Energie Atomique
- Bernard Aspar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Formation of a semiconductor substrate that may be dismantled and o...
- Patent number 7,238,598
- Issue date Jul 3, 2007
- Commissariat a l'Energie Atomique
- Chrystelle Lagahe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Two-stage annealing method for manufacturing semiconductor substrates
- Patent number 6,936,523
- Issue date Aug 30, 2005
- S.O.I.Tec Silicon on Insulator Technologies S.A.
- Cecile Berne
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing a thin membrane and resulting structure with m...
- Patent number 6,465,327
- Issue date Oct 15, 2002
- Commissariat a l'Energie Atomique
- Bernard Aspar
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
PROCESS OF TREATING DEFECTS DURING THE BONDING OF WAFERS
- Publication number 20130323861
- Publication date Dec 5, 2013
- SOITEC
- Chrystelle Lagahe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROCESS OF TREATING DEFECTS DURING THE BONDING OF WAFERS
- Publication number 20100285213
- Publication date Nov 11, 2010
- S.O.I.Tec Silicon on Insulator Technologies
- Chrystelle Lagahe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for production of a very thin layer with thinning by means o...
- Publication number 20070020895
- Publication date Jan 25, 2007
- COMMISSARIAT A L'ENERGIE ATOMIQUE
- Hubert Moriceau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for making a detachable semiconductor substrate and for obta...
- Publication number 20060019476
- Publication date Jan 26, 2006
- Chrystelle Lagahe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Two-stage annealing method for manufacturing semiconductor substrates
- Publication number 20040161904
- Publication date Aug 19, 2004
- SOITEC & CEA
- Cecile Berne
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Embrittled substrate and method for making same
- Publication number 20030077885
- Publication date Apr 24, 2003
- Bernard Aspar
- H01 - BASIC ELECTRIC ELEMENTS

Chrystelle Lagahe

Person

Patents Grantslast 30 patents

Process of treating defects during the bonding of wafers

Process of treating defects during the bonding of wafers

Method for production of a very thin layer with thinning by means o...

Embrittled substrate and method for making same

Formation of a semiconductor substrate that may be dismantled and o...

Two-stage annealing method for manufacturing semiconductor substrates

Method for producing a thin membrane and resulting structure with m...

Patents Applicationslast 30 patents

PROCESS OF TREATING DEFECTS DURING THE BONDING OF WAFERS

PROCESS OF TREATING DEFECTS DURING THE BONDING OF WAFERS

Method for production of a very thin layer with thinning by means o...

Method for making a detachable semiconductor substrate and for obta...

Two-stage annealing method for manufacturing semiconductor substrates

Embrittled substrate and method for making same