Chulbum Kim

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Accessing memory devices via switchable channels
- Patent number 12,189,958
- Issue date Jan 7, 2025
- Micron Technology, Inc.
- Chulbum Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Status check using chip enable pin
- Patent number 12,169,461
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Chulbum Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serial interface for an active input/output expander of a memory su...
- Patent number 12,130,755
- Issue date Oct 29, 2024
- Micron Technology, Inc.
- Suresh Rajgopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective management of erase operations in memory devices that ena...
- Patent number 11,942,159
- Issue date Mar 26, 2024
- Micron Technology, Inc.
- Chulbum Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device status push within memory sub-system
- Patent number 11,687,237
- Issue date Jun 27, 2023
- Micron Technology, Inc.
- Chulbum Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Status check using chip enable pin
- Patent number 11,500,791
- Issue date Nov 15, 2022
- Micron Technology, Inc.
- Chulbum Kim
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SELECTIVE MANAGEMENT OF ERASE OPERATIONS IN MEMORY DEVICES THAT ENA...
- Publication number 20240203508
- Publication date Jun 20, 2024
- Micron Technology, Inc.
- Chulbum Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCESSING MEMORY DEVICES VIA SWITCHABLE CHANNELS
- Publication number 20240069738
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Chulbum Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY WITH SWITCHABLE CHANNELS
- Publication number 20240069721
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Sundararajan Sankaranarayanan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE CURRENT QUANTIZATION VALUES FOR PEAK POWER MANAGEMENT
- Publication number 20240061592
- Publication date Feb 22, 2024
- Micron Technology, Inc.
- Chulbum Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PEAK POWER MANAGEMENT PRIORITY OVERRIDE
- Publication number 20230350587
- Publication date Nov 2, 2023
- Micron Technology, Inc.
- Jeremy Binfet
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SERIAL INTERFACE FOR AN ACTIVE INPUT/OUTPUT EXPANDER OF A MEMORY SU...
- Publication number 20230075279
- Publication date Mar 9, 2023
- Micron Technology, Inc.
- Suresh Rajgopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE MANAGEMENT OF ERASE OPERATIONS IN MEMORY DEVICES THAT ENA...
- Publication number 20230063656
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- Chulbum Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STATUS CHECK USING CHIP ENABLE PIN
- Publication number 20230043140
- Publication date Feb 9, 2023
- Micron Technology, Inc.
- Chulbum Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE STATUS PUSH WITHIN MEMORY SUB-SYSTEM
- Publication number 20230045463
- Publication date Feb 9, 2023
- Micron Technology, Inc.
- Chulbum Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STATUS CHECK USING CHIP ENABLE PIN
- Publication number 20220188247
- Publication date Jun 16, 2022
- Micron Technology, Inc.
- Chulbum Kim
- G06 - COMPUTING CALCULATING COUNTING

Chulbum Kim

Person

Patents Grantslast 30 patents

Accessing memory devices via switchable channels

Status check using chip enable pin

Serial interface for an active input/output expander of a memory su...

Selective management of erase operations in memory devices that ena...

Memory device status push within memory sub-system

Status check using chip enable pin

Patents Applicationslast 30 patents

SELECTIVE MANAGEMENT OF ERASE OPERATIONS IN MEMORY DEVICES THAT ENA...

ACCESSING MEMORY DEVICES VIA SWITCHABLE CHANNELS

MEMORY WITH SWITCHABLE CHANNELS

MULTIPLE CURRENT QUANTIZATION VALUES FOR PEAK POWER MANAGEMENT

PEAK POWER MANAGEMENT PRIORITY OVERRIDE

SERIAL INTERFACE FOR AN ACTIVE INPUT/OUTPUT EXPANDER OF A MEMORY SU...

SELECTIVE MANAGEMENT OF ERASE OPERATIONS IN MEMORY DEVICES THAT ENA...

STATUS CHECK USING CHIP ENABLE PIN

MEMORY DEVICE STATUS PUSH WITHIN MEMORY SUB-SYSTEM

STATUS CHECK USING CHIP ENABLE PIN