Chunhui Mei

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Dual pipeline parallel systolic array
- Patent number 12,189,571
- Issue date Jan 7, 2025
- Intel Corporation
- Jorge Parra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Random sparsity handling in a systolic array
- Patent number 12,086,205
- Issue date Sep 10, 2024
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Utilizing structured sparsity in systolic arrays
- Patent number 11,977,885
- Issue date May 7, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Conversion hardware mechanism
- Patent number 11,494,163
- Issue date Nov 8, 2022
- Intel Corporation
- Naveen Mellempudi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-linear processing of two-dimensional data
- Patent number 10,504,462
- Issue date Dec 10, 2019
- QUALCOMM Incorporated
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Constant multiplication with texture unit of graphics processing unit
- Patent number 10,089,708
- Issue date Oct 2, 2018
- QUALCOMM Incorporated
- Andrew Evan Gruber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resource sharing on shader processor of GPU
- Patent number 10,026,145
- Issue date Jul 17, 2018
- QUALCOMM Incorporated
- Alexei Vladimirovich Bourd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shader pipeline with shared data channels
- Patent number 9,679,347
- Issue date Jun 13, 2017
- QUALCOMM Incorporated
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
GPU divergence barrier
- Patent number 9,652,284
- Issue date May 16, 2017
- QUALCOMM Incorporated
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stochastic rasterization using enhanced stencil operations on a gra...
- Patent number 9,626,762
- Issue date Apr 18, 2017
- QUALCOMM Incorporated
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rendering graphics to overlapping bins
- Patent number 9,569,811
- Issue date Feb 14, 2017
- QUALCOMM Incorporated
- Andrew Evan Gruber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Output ordering of domain coordinates for tessellation
- Patent number 9,123,168
- Issue date Sep 1, 2015
- QUALCOMM Incorporated
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
UTILIZING STRUCTURED SPARSITY IN SYSTOLIC ARRAYS
- Publication number 20240320000
- Publication date Sep 26, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BROADCAST ASYNCHRONOUS LOADS TO SHARED LOCAL MEMORY
- Publication number 20240232088
- Publication date Jul 11, 2024
- Intel Corporation
- John A. Wiegert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NAMED AND CLUSTER BARRIERS
- Publication number 20240231957
- Publication date Jul 11, 2024
- Intel Corporation
- Fangwen Fu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNCHRONIZATION FOR DATA MULTICAST IN COMPUTE CORE CLUSTERS
- Publication number 20240220335
- Publication date Jul 4, 2024
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE AND CONFIGURABLE CLUSTERED SYSTOLIC ARRAY
- Publication number 20240220448
- Publication date Jul 4, 2024
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA MULTICAST IN COMPUTE CORE CLUSTERS
- Publication number 20240220254
- Publication date Jul 4, 2024
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOCALLY BIASED CACHE REPLACEMENT FOR CLUSTERED CACHE ARCHITECTURE
- Publication number 20240220420
- Publication date Jul 4, 2024
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INCREASING PROCESSING RESOURCES IN PROCESSING CORES OF A GRAPHICS E...
- Publication number 20240160478
- Publication date May 16, 2024
- Intel Corporation
- Jiasheng Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NAMED AND CLUSTER BARRIERS
- Publication number 20240134719
- Publication date Apr 25, 2024
- Intel Corporation
- Fangwen Fu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BROADCAST ASYNCHRONOUS LOADS TO SHARED LOCAL MEMORY
- Publication number 20240134797
- Publication date Apr 25, 2024
- Intel Corporation
- John A. Wiegert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNCHRONIZATION UTILIZING LOCAL TEAM BARRIERS FOR THREAD TEAM PROCE...
- Publication number 20240111609
- Publication date Apr 4, 2024
- Intel Corporation
- Biju George
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARED LOCAL REGISTERS FOR THREAD TEAM PROCESSING
- Publication number 20240112295
- Publication date Apr 4, 2024
- Intel Corporation
- Biju George
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINISTIC BROADCASTING FROM SHARED MEMORY
- Publication number 20240111534
- Publication date Apr 4, 2024
- Intel Corporation
- Fangwen Fu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PREFETCH AWARE LRU CACHE REPLACEMENT POLICY
- Publication number 20240104025
- Publication date Mar 28, 2024
- Intel Corporation
- Biju George
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREAD GROUP DISPATCH IN A CLUSTERED GRAPHICS ARCHITECTURE
- Publication number 20230205587
- Publication date Jun 29, 2023
- Intel Corporation
- Zamshed Iqbal Chowdhury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FORWARD PROGRESS GUARANTEE USING SINGLE-LEVEL SYNCHRONIZATION AT IN...
- Publication number 20230153176
- Publication date May 18, 2023
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DUAL PIPELINE PARALLEL SYSTOLIC ARRAY
- Publication number 20220414054
- Publication date Dec 29, 2022
- Intel Corporation
- Jorge Parra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RANDOM SPARSITY HANDLING IN A SYSTOLIC ARRAY
- Publication number 20220309124
- Publication date Sep 29, 2022
- Intel Corporation
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UTILIZING STRUCTURED SPARSITY IN SYSTOLIC ARRAYS
- Publication number 20210081201
- Publication date Mar 18, 2021
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE CONVERSION HARDWARE
- Publication number 20210072955
- Publication date Mar 11, 2021
- Intel Corporation
- Naveen MELLEMPUDI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-LINEAR PROCESSING OF TWO-DIMENSIONAL DATA
- Publication number 20190228723
- Publication date Jul 25, 2019
- QUALCOMM Incorporated
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RESOURCE SHARING ON SHADER PROCESSOR OF GPU
- Publication number 20180165786
- Publication date Jun 14, 2018
- QUALCOMM Incorporated
- Alexei Vladimirovich Bourd
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONSTANT MULTIPLICATION WITH TEXTURE UNIT OF GRAPHICS PROCESSING UNIT
- Publication number 20170316540
- Publication date Nov 2, 2017
- QUALCOMM Incorporated
- Andrew Evan Gruber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RENDERING GRAPHICS TO OVERLAPPING BINS
- Publication number 20150379663
- Publication date Dec 31, 2015
- QUALCOMM Incorporated
- Andrew Evan Gruber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STOCHASTIC RASTERIZATION USING ENHANCED STENCIL OPERATIONS ON A GRA...
- Publication number 20150294498
- Publication date Oct 15, 2015
- QUALCOMM Incorporated
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHADER PIPELINE WITH SHARED DATA CHANNELS
- Publication number 20150235341
- Publication date Aug 20, 2015
- QUALCOMM Incorporated
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GPU DIVERGENCE BARRIER
- Publication number 20150095914
- Publication date Apr 2, 2015
- QUALCOMM Incorporated
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OUTPUT ORDERING OF DOMAIN COORDINATES FOR TESSELLATION
- Publication number 20140210819
- Publication date Jul 31, 2014
- QUALCOMM Incorporated
- Chunhui Mei
- G06 - COMPUTING CALCULATING COUNTING

Chunhui Mei

Person

Patents Grantslast 30 patents

Dual pipeline parallel systolic array

Random sparsity handling in a systolic array

Utilizing structured sparsity in systolic arrays

Conversion hardware mechanism

Non-linear processing of two-dimensional data

Constant multiplication with texture unit of graphics processing unit

Resource sharing on shader processor of GPU

Shader pipeline with shared data channels

GPU divergence barrier

Stochastic rasterization using enhanced stencil operations on a gra...

Rendering graphics to overlapping bins

Output ordering of domain coordinates for tessellation

Patents Applicationslast 30 patents

UTILIZING STRUCTURED SPARSITY IN SYSTOLIC ARRAYS

BROADCAST ASYNCHRONOUS LOADS TO SHARED LOCAL MEMORY

NAMED AND CLUSTER BARRIERS

SYNCHRONIZATION FOR DATA MULTICAST IN COMPUTE CORE CLUSTERS

SCALABLE AND CONFIGURABLE CLUSTERED SYSTOLIC ARRAY

DATA MULTICAST IN COMPUTE CORE CLUSTERS

LOCALLY BIASED CACHE REPLACEMENT FOR CLUSTERED CACHE ARCHITECTURE

INCREASING PROCESSING RESOURCES IN PROCESSING CORES OF A GRAPHICS E...

NAMED AND CLUSTER BARRIERS

BROADCAST ASYNCHRONOUS LOADS TO SHARED LOCAL MEMORY

SYNCHRONIZATION UTILIZING LOCAL TEAM BARRIERS FOR THREAD TEAM PROCE...

SHARED LOCAL REGISTERS FOR THREAD TEAM PROCESSING

DETERMINISTIC BROADCASTING FROM SHARED MEMORY

PREFETCH AWARE LRU CACHE REPLACEMENT POLICY

THREAD GROUP DISPATCH IN A CLUSTERED GRAPHICS ARCHITECTURE

FORWARD PROGRESS GUARANTEE USING SINGLE-LEVEL SYNCHRONIZATION AT IN...

DUAL PIPELINE PARALLEL SYSTOLIC ARRAY

RANDOM SPARSITY HANDLING IN A SYSTOLIC ARRAY

UTILIZING STRUCTURED SPARSITY IN SYSTOLIC ARRAYS

PROGRAMMABLE CONVERSION HARDWARE

NON-LINEAR PROCESSING OF TWO-DIMENSIONAL DATA

RESOURCE SHARING ON SHADER PROCESSOR OF GPU

CONSTANT MULTIPLICATION WITH TEXTURE UNIT OF GRAPHICS PROCESSING UNIT

RENDERING GRAPHICS TO OVERLAPPING BINS

STOCHASTIC RASTERIZATION USING ENHANCED STENCIL OPERATIONS ON A GRA...

SHADER PIPELINE WITH SHARED DATA CHANNELS

GPU DIVERGENCE BARRIER

OUTPUT ORDERING OF DOMAIN COORDINATES FOR TESSELLATION