Clarence A. Lund

Person

Mesa, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of preventing dielectric degradation or rupture
- Patent number 4,916,082
- Issue date Apr 10, 1990
- Motorola Inc.
- Israel A. Lesk
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Means and method for providing contact separation in silicided devices
- Patent number 4,908,688
- Issue date Mar 13, 1990
- Motorola, Inc.
- Clarence A. Lund
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned semiconductor device with non-diffusable contacts
- Patent number 4,782,373
- Issue date Nov 1, 1988
- Motorola Inc.
- Clarence A. Lund
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for providing contact separation in silicided devices using...
- Patent number 4,753,897
- Issue date Jun 28, 1988
- Motorola Inc.
- Clarence A. Lund
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Radiation hard MOS devices and methods for the manufacture thereof
- Patent number 4,591,890
- Issue date May 27, 1986
- Motorola Inc.
- Clarence A. Lund
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low resistance buried power bus for integrated circuits
- Patent number 4,503,451
- Issue date Mar 5, 1985
- Motorola, Inc.
- Clarence A. Lund
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making self-aligned device
- Patent number 4,319,395
- Issue date Mar 16, 1982
- Motorola, Inc.
- Clarence A. Lund
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a high-speed semiconductor device
- Patent number 4,047,976
- Issue date Sep 13, 1977
- Motorola, Inc.
- Jerry L. Bledsoe
- H01 - BASIC ELECTRIC ELEMENTS

Clarence A. Lund

Person

Patents Grantslast 30 patents

Method of preventing dielectric degradation or rupture

Means and method for providing contact separation in silicided devices

Self-aligned semiconductor device with non-diffusable contacts

Method for providing contact separation in silicided devices using...

Radiation hard MOS devices and methods for the manufacture thereof

Low resistance buried power bus for integrated circuits

Method of making self-aligned device

Method for manufacturing a high-speed semiconductor device